drm: bridge/dw-hdmi: add support for hdmi bitstream audio

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / bridge / dw-hdmi.h

diff --git a/drivers/gpu/drm/bridge/dw-hdmi.h b/drivers/gpu/drm/bridge/dw-hdmi.h
index 70db49815fb6a65a60155b700adaf03f9f6f67cb..2517cb38c0ba641c882358be3a6c78b927f7cf2f 100644 (file)
--- a/drivers/gpu/drm/bridge/dw-hdmi.h
+++ b/drivers/gpu/drm/bridge/dw-hdmi.h
@@ -162,6 +162,15 @@
 #define HDMI_FC_SPDDEVICEINF                    0x1062
 #define HDMI_FC_AUDSCONF                        0x1063
 #define HDMI_FC_AUDSSTAT                        0x1064
+#define HDMI_FC_AUDSCHNLS0                      0x1067
+#define HDMI_FC_AUDSCHNLS1                      0x1068
+#define HDMI_FC_AUDSCHNLS2                      0x1069
+#define HDMI_FC_AUDSCHNLS3                      0x106a
+#define HDMI_FC_AUDSCHNLS4                      0x106b
+#define HDMI_FC_AUDSCHNLS5                      0x106c
+#define HDMI_FC_AUDSCHNLS6                      0x106d
+#define HDMI_FC_AUDSCHNLS7                      0x106e
+#define HDMI_FC_AUDSCHNLS8                      0x106f
 #define HDMI_FC_DATACH0FILL                     0x1070
 #define HDMI_FC_DATACH1FILL                     0x1071
 #define HDMI_FC_DATACH2FILL                     0x1072
@@ -744,6 +753,8 @@ enum {
 /* HDMI_FC_AUDSCHNLS7 field values */
        HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
        HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
+       HDMI_FC_AUDSCHNLS7_SAMPFREQ_OFFSET = 0,
+       HDMI_FC_AUDSCHNLS7_SAMPFREQ_MASK = 0x0f,
 
 /* HDMI_FC_AUDSCHNLS8 field values */
        HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
@@ -751,6 +762,15 @@ enum {
        HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,
        HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,
 
+/* HDMI_FC_AUDSCHNLS Sample Rate */
+       HDMI_FC_AUDSCHNLS_32K = 0x3,
+       HDMI_FC_AUDSCHNLS_441K = 0x0,
+       HDMI_FC_AUDSCHNLS_48K = 0x2,
+       HDMI_FC_AUDSCHNLS_882K = 0x8,
+       HDMI_FC_AUDSCHNLS_96K = 0xa,
+       HDMI_FC_AUDSCHNLS_1764K = 0xc,
+       HDMI_FC_AUDSCHNLS_192K = 0xe,
+
 /* FC_AUDSCONF field values */
        HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,
        HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,
@@ -909,11 +929,16 @@ enum {
        HDMI_AUD_CONF0_I2S_8CHANNEL_ENABLE = 0x2F,
        HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
 
+/* AUD_INT field values */
+       HDMI_AUD_INT_FIFO_EMPTY_MSK = BIT(3),
+       HDMI_AUD_INT_FIFO_FULL_MSK = BIT(2),
+
 /* AUD_CONF1 field values */
        HDMI_AUD_CONF1_MODE_I2S = 0x00,
        HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
        HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
        HDMI_AUD_CONF1_WIDTH_16 = 0x10,
+       HDMI_AUD_CONF1_WIDTH_21 = 0x15,
        HDMI_AUD_CONF1_WIDTH_24 = 0x18,
 
 /* AUD_CONF2 filed values */
@@ -1092,6 +1117,9 @@ enum {
        HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,
        HDMI_I2CM_DIV_FAST_MODE = 0x8,
        HDMI_I2CM_DIV_STD_MODE = 0,
+
+/* HDMI_MC_SWRSTZ filed values */
+       HDMI_MC_SWRSTZ_I2S_RESET_MSK = BIT(3),
 };
 
 #endif /* __DW_HDMI_H__ */