drm/i915: gen7: Disable the RHWO optimization as it can cause GPU hangs.

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / i915 / i915_reg.h

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5d5def756c9e5beee9ae10def1cbe39d5f7cf02f..56315cbef1e43f8861317d62c7df02bb5480ae58 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2544,10 +2544,18 @@
 #define _CURBBASE              0x700c4
 #define _CURBPOS                       0x700c8
 
+#define _CURBCNTR_IVB          0x71080
+#define _CURBBASE_IVB          0x71084
+#define _CURBPOS_IVB           0x71088
+
 #define CURCNTR(pipe) _PIPE(pipe, _CURACNTR, _CURBCNTR)
 #define CURBASE(pipe) _PIPE(pipe, _CURABASE, _CURBBASE)
 #define CURPOS(pipe) _PIPE(pipe, _CURAPOS, _CURBPOS)
 
+#define CURCNTR_IVB(pipe) _PIPE(pipe, _CURACNTR, _CURBCNTR_IVB)
+#define CURBASE_IVB(pipe) _PIPE(pipe, _CURABASE, _CURBBASE_IVB)
+#define CURPOS_IVB(pipe) _PIPE(pipe, _CURAPOS, _CURBPOS_IVB)
+
 /* Display A control */
 #define _DSPACNTR                0x70180
 #define   DISPLAY_PLANE_ENABLE                 (1<<31)
@@ -2839,6 +2847,20 @@
 #define  DISP_TILE_SURFACE_SWIZZLING   (1<<13)
 #define  DISP_FBC_WM_DIS               (1<<15)
 
+/* GEN7 chicken */
+#define GEN7_COMMON_SLICE_CHICKEN1             0x7010
+# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC     ((1<<10) | (1<<26))
+
+#define GEN7_L3CNTLREG1                                0xB01C
+#define  GEN7_WA_FOR_GEN7_L3_CONTROL                   0x3C4FFF8C
+
+#define GEN7_L3_CHICKEN_MODE_REGISTER          0xB030
+#define  GEN7_WA_L3_CHICKEN_MODE                               0x20000000
+
+/* WaCatErrorRejectionIssue */
+#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG         0x9030
+#define  GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB      (1<<11)
+
 /* PCH */
 
 /* south display engine interrupt */
@@ -3133,6 +3155,7 @@
 #define  FDI_LINK_TRAIN_NONE_IVB            (3<<8)
 
 /* both Tx and Rx */
+#define  FDI_COMPOSITE_SYNC            (1<<11)
 #define  FDI_LINK_TRAIN_AUTO           (1<<10)
 #define  FDI_SCRAMBLING_ENABLE          (0<<7)
 #define  FDI_SCRAMBLING_DISABLE         (1<<7)
@@ -3361,6 +3384,11 @@
 
 #define  GT_FIFO_FREE_ENTRIES                  0x120008
 
+#define GEN6_UCGCTL2                           0x9404
+# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE               (1 << 13)
+# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE              (1 << 12)
+# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE               (1 << 11)
+
 #define GEN6_RPNSWREQ                          0xA008
 #define   GEN6_TURBO_DISABLE                   (1<<31)
 #define   GEN6_FREQUENCY(x)                    ((x)<<25)