if (clock > hdmi_port_clock_limit(hdmi, respect_dvi_limit))
return MODE_CLOCK_HIGH;
- /* CHV/BXT DPLL can't generate 216-240 MHz */
- if ((IS_CHERRYVIEW(dev) || IS_BROXTON(dev)) &&
- clock > 216000 && clock < 240000)
+ /* BXT DPLL can't generate 223-240 MHz */
+ if (IS_BROXTON(dev) && clock > 223333 && clock < 240000)
+ return MODE_CLOCK_RANGE;
+
+ /* CHV DPLL can't generate 216-240 MHz */
+ if (IS_CHERRYVIEW(dev) && clock > 216000 && clock < 240000)
return MODE_CLOCK_RANGE;
return MODE_OK;