drm/gk104-/disp: infoframe registers moved yet again on kepler
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / nouveau / core / engine / disp / nve0.c
index 1e5a79a5cc4f027f98d84ea9f2807d5aca56bb26..db144b2cf06bd7a98df12c59a718a608ba5ef27b 100644 (file)
@@ -25,7 +25,7 @@
 #include <engine/software.h>
 #include <engine/disp.h>
 
-#include <core/class.h>
+#include <nvif/class.h>
 
 #include "nv50.h"
 
@@ -200,17 +200,17 @@ nve0_disp_ovly_mthd_chan = {
 
 static struct nouveau_oclass
 nve0_disp_sclass[] = {
-       { NVE0_DISP_MAST_CLASS, &nvd0_disp_mast_ofuncs },
-       { NVE0_DISP_SYNC_CLASS, &nvd0_disp_sync_ofuncs },
-       { NVE0_DISP_OVLY_CLASS, &nvd0_disp_ovly_ofuncs },
-       { NVE0_DISP_OIMM_CLASS, &nvd0_disp_oimm_ofuncs },
-       { NVE0_DISP_CURS_CLASS, &nvd0_disp_curs_ofuncs },
+       { GK104_DISP_CORE_CHANNEL_DMA, &nvd0_disp_mast_ofuncs.base },
+       { GK104_DISP_BASE_CHANNEL_DMA, &nvd0_disp_sync_ofuncs.base },
+       { GK104_DISP_OVERLAY_CONTROL_DMA, &nvd0_disp_ovly_ofuncs.base },
+       { GK104_DISP_OVERLAY, &nvd0_disp_oimm_ofuncs.base },
+       { GK104_DISP_CURSOR, &nvd0_disp_curs_ofuncs.base },
        {}
 };
 
 static struct nouveau_oclass
 nve0_disp_base_oclass[] = {
-       { NVE0_DISP_CLASS, &nvd0_disp_base_ofuncs, nvd0_disp_base_omthds },
+       { GK104_DISP, &nvd0_disp_base_ofuncs },
        {}
 };
 
@@ -233,6 +233,10 @@ nve0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
 
+       ret = nvkm_event_init(&nvd0_disp_chan_uevent, 1, 17, &priv->uevent);
+       if (ret)
+               return ret;
+
        nv_engine(priv)->sclass = nve0_disp_base_oclass;
        nv_engine(priv)->cclass = &nv50_disp_cclass;
        nv_subdev(priv)->intr = nvd0_disp_intr;
@@ -245,7 +249,7 @@ nve0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        priv->dac.sense = nv50_dac_sense;
        priv->sor.power = nv50_sor_power;
        priv->sor.hda_eld = nvd0_hda_eld;
-       priv->sor.hdmi = nvd0_hdmi_ctrl;
+       priv->sor.hdmi = nve0_hdmi_ctrl;
        return 0;
 }
 
@@ -264,4 +268,5 @@ nve0_disp_oclass = &(struct nv50_disp_impl) {
        .mthd.base = &nvd0_disp_sync_mthd_chan,
        .mthd.ovly = &nve0_disp_ovly_mthd_chan,
        .mthd.prev = -0x020000,
+       .head.scanoutpos = nvd0_disp_base_scanoutpos,
 }.base.base;