#include "fuc/gt215.fuc3.h"
#include <core/client.h>
-#include <core/device.h>
#include <core/enum.h>
-struct gt215_ce_priv {
- struct nvkm_falcon base;
-};
-
/*******************************************************************************
* Copy object classes
******************************************************************************/
void
gt215_ce_intr(struct nvkm_subdev *subdev)
{
- struct nvkm_fifo *pfifo = nvkm_fifo(subdev);
- struct nvkm_engine *engine = nv_engine(subdev);
- struct nvkm_falcon *falcon = (void *)subdev;
+ struct nvkm_falcon *ce = (void *)subdev;
+ struct nvkm_engine *engine = &ce->engine;
+ struct nvkm_device *device = engine->subdev.device;
+ struct nvkm_fifo *fifo = device->fifo;
struct nvkm_object *engctx;
- u32 dispatch = nv_ro32(falcon, 0x01c);
- u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16);
- u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff;
- u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff;
- u32 addr = nv_ro32(falcon, 0x040) >> 16;
+ const struct nvkm_enum *en;
+ const u32 base = (nv_subidx(subdev) - NVDEV_ENGINE_CE0) * 0x1000;
+ u32 dispatch = nvkm_rd32(device, 0x10401c + base);
+ u32 stat = nvkm_rd32(device, 0x104008 + base) & dispatch & ~(dispatch >> 16);
+ u64 inst = nvkm_rd32(device, 0x104050 + base) & 0x3fffffff;
+ u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff;
+ u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16;
u32 mthd = (addr & 0x07ff) << 2;
u32 subc = (addr & 0x3800) >> 11;
- u32 data = nv_ro32(falcon, 0x044);
+ u32 data = nvkm_rd32(device, 0x104044 + base);
int chid;
engctx = nvkm_engctx_get(engine, inst);
- chid = pfifo->chid(pfifo, engctx);
+ chid = fifo->chid(fifo, engctx);
if (stat & 0x00000040) {
- nv_error(falcon, "DISPATCH_ERROR [");
- nvkm_enum_print(gt215_ce_isr_error_name, ssta);
- pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n",
- chid, inst << 12, nvkm_client_name(engctx), subc,
- mthd, data);
- nv_wo32(falcon, 0x004, 0x00000040);
+ en = nvkm_enum_find(gt215_ce_isr_error_name, ssta);
+ nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] "
+ "ch %d [%010llx %s] subc %d "
+ "mthd %04x data %08x\n",
+ ssta, en ? en->name : "", chid, inst << 12,
+ nvkm_client_name(engctx), subc, mthd, data);
+ nvkm_wr32(device, 0x104004 + base, 0x00000040);
stat &= ~0x00000040;
}
if (stat) {
- nv_error(falcon, "unhandled intr 0x%08x\n", stat);
- nv_wo32(falcon, 0x004, stat);
+ nvkm_error(subdev, "intr %08x\n", stat);
+ nvkm_wr32(device, 0x104004 + base, stat);
}
nvkm_engctx_put(engctx);
struct nvkm_object **pobject)
{
bool enable = (nv_device(parent)->chipset != 0xaf);
- struct gt215_ce_priv *priv;
+ struct nvkm_falcon *ce;
int ret;
ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, enable,
- "PCE0", "ce0", &priv);
- *pobject = nv_object(priv);
+ "PCE0", "ce0", &ce);
+ *pobject = nv_object(ce);
if (ret)
return ret;
- nv_subdev(priv)->unit = 0x00802000;
- nv_subdev(priv)->intr = gt215_ce_intr;
- nv_engine(priv)->cclass = >215_ce_cclass;
- nv_engine(priv)->sclass = gt215_ce_sclass;
- nv_falcon(priv)->code.data = gt215_pce_code;
- nv_falcon(priv)->code.size = sizeof(gt215_pce_code);
- nv_falcon(priv)->data.data = gt215_pce_data;
- nv_falcon(priv)->data.size = sizeof(gt215_pce_data);
+ nv_subdev(ce)->unit = 0x00802000;
+ nv_subdev(ce)->intr = gt215_ce_intr;
+ nv_engine(ce)->cclass = >215_ce_cclass;
+ nv_engine(ce)->sclass = gt215_ce_sclass;
+ nv_falcon(ce)->code.data = gt215_ce_code;
+ nv_falcon(ce)->code.size = sizeof(gt215_ce_code);
+ nv_falcon(ce)->data.data = gt215_ce_data;
+ nv_falcon(ce)->data.size = sizeof(gt215_ce_data);
return 0;
}
.dtor = _nvkm_falcon_dtor,
.init = _nvkm_falcon_init,
.fini = _nvkm_falcon_fini,
- .rd32 = _nvkm_falcon_rd32,
- .wr32 = _nvkm_falcon_wr32,
},
};