drm/nouveau/disp: convert to new-style nvkm_engine
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / nouveau / nvkm / engine / device / gm100.c
index a3c87b26dd9fc8bcc2e8b65c653c2f9343fe19e1..c0c1bd3989d603122f0596883e8aa50fa82d55f5 100644 (file)
@@ -28,99 +28,48 @@ gm100_identify(struct nvkm_device *device)
 {
        switch (device->chipset) {
        case 0x117:
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
-               device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
-               device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
 
 #if 0
-               device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
-               device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
-               device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
-               device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
 #endif
                break;
        case 0x124:
 #if 0
                /* looks to be some non-trivial changes */
                /* priv ring says no to 0x10eb14 writes */
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
 #endif
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
-               device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
-               device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
 #if 0
-               device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gm204_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm204_gr_oclass;
-               device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &gm204_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &gm204_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
-               device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
-               device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
 #endif
                break;
        case 0x126:
 #if 0
                /* looks to be some non-trivial changes */
                /* priv ring says no to 0x10eb14 writes */
-               device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
 #endif
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
-               device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
-               device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
-               device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
 #if 0
-               device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
 #endif
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gm204_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm206_gr_oclass;
-               device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
-               device->oclass[NVDEV_ENGINE_CE0    ] = &gm204_ce0_oclass;
-               device->oclass[NVDEV_ENGINE_CE1    ] = &gm204_ce1_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
 #if 0
-               device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
-               device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
-               device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
 #endif
                break;
        case 0x12b:
 
-               device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
-               device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
-               device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gm20b_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] =  gm20b_gr_oclass;
-               device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
                break;
        default:
                return -EINVAL;