drm/radeon: make VM size a module parameter (v2)

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / radeon.h

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index f21db7a0b34d7d231bc278b1865bb83d4a1e1d72..6f32f16e12dc3011b954e0c21dc9f61bd2f8d865 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -100,6 +100,7 @@ extern int radeon_dpm;
 extern int radeon_aspm;
 extern int radeon_runtime_pm;
 extern int radeon_hard_reset;
+extern int radeon_vm_size;
 
 /*
  * Copy from radeon_drv.h so we don't have to include both and have conflicting
@@ -676,14 +677,16 @@ void radeon_doorbell_free(struct radeon_device *rdev, u32 doorbell);
  * IRQS.
  */
 
-struct radeon_unpin_work {
-       struct work_struct work;
-       struct radeon_device *rdev;
-       int crtc_id;
-       struct radeon_fence *fence;
+struct radeon_flip_work {
+       struct work_struct              flip_work;
+       struct work_struct              unpin_work;
+       struct radeon_device            *rdev;
+       int                             crtc_id;
+       struct drm_framebuffer          *fb;
        struct drm_pending_vblank_event *event;
-       struct radeon_bo *old_rbo;
-       u64 new_crtc_base;
+       struct radeon_bo                *old_rbo;
+       struct radeon_bo                *new_rbo;
+       struct radeon_fence             *fence;
 };
 
 struct r500_irq_stat_regs {
@@ -730,6 +733,12 @@ struct cik_irq_stat_regs {
        u32 disp_int_cont4;
        u32 disp_int_cont5;
        u32 disp_int_cont6;
+       u32 d1grph_int;
+       u32 d2grph_int;
+       u32 d3grph_int;
+       u32 d4grph_int;
+       u32 d5grph_int;
+       u32 d6grph_int;
 };
 
 union radeon_irq_stat_regs {
@@ -739,7 +748,7 @@ union radeon_irq_stat_regs {
        struct cik_irq_stat_regs cik;
 };
 
-#define RADEON_MAX_HPD_PINS 6
+#define RADEON_MAX_HPD_PINS 7
 #define RADEON_MAX_CRTCS 6
 #define RADEON_MAX_AFMT_BLOCKS 7
 
@@ -848,6 +857,15 @@ struct radeon_mec {
 #define R600_PTE_READABLE      (1 << 5)
 #define R600_PTE_WRITEABLE     (1 << 6)
 
+/* PTE (Page Table Entry) fragment field for different page sizes */
+#define R600_PTE_FRAG_4KB      (0 << 7)
+#define R600_PTE_FRAG_64KB     (4 << 7)
+#define R600_PTE_FRAG_256KB    (6 << 7)
+
+/* flags used for GART page table entries on R600+ */
+#define R600_PTE_GART  ( R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED \
+                       | R600_PTE_READABLE | R600_PTE_WRITEABLE)
+
 struct radeon_vm_pt {
        struct radeon_bo                *bo;
        uint64_t                        addr;
@@ -980,8 +998,8 @@ struct radeon_cs_reloc {
        struct radeon_bo                *robj;
        struct ttm_validate_buffer      tv;
        uint64_t                        gpu_offset;
-       unsigned                        domain;
-       unsigned                        alt_domain;
+       unsigned                        prefered_domains;
+       unsigned                        allowed_domains;
        uint32_t                        tiling_flags;
        uint32_t                        handle;
 };
@@ -1636,6 +1654,7 @@ struct radeon_vce {
        unsigned                fb_version;
        atomic_t                handles[RADEON_MAX_VCE_HANDLES];
        struct drm_file         *filp[RADEON_MAX_VCE_HANDLES];
+       unsigned                img_size[RADEON_MAX_VCE_HANDLES];
        struct delayed_work     idle_work;
 };
 
@@ -1649,7 +1668,7 @@ int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
                               uint32_t handle, struct radeon_fence **fence);
 void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp);
 void radeon_vce_note_usage(struct radeon_device *rdev);
-int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi);
+int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi, unsigned size);
 int radeon_vce_cs_parse(struct radeon_cs_parser *p);
 bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
                               struct radeon_ring *ring,
@@ -1764,7 +1783,8 @@ struct radeon_asic {
        /* gart */
        struct {
                void (*tlb_flush)(struct radeon_device *rdev);
-               int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr);
+               void (*set_page)(struct radeon_device *rdev, unsigned i,
+                                uint64_t addr);
        } gart;
        struct {
                int (*init)(struct radeon_device *rdev);
@@ -1876,9 +1896,8 @@ struct radeon_asic {
        } dpm;
        /* pageflipping */
        struct {
-               void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
-               u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
-               void (*post_page_flip)(struct radeon_device *rdev, int crtc);
+               void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
+               bool (*page_flip_pending)(struct radeon_device *rdev, int crtc);
        } pflip;
 };
 
@@ -2321,6 +2340,7 @@ struct radeon_device {
        bool have_disp_power_ref;
 };
 
+bool radeon_is_px(struct drm_device *dev);
 int radeon_device_init(struct radeon_device *rdev,
                       struct drm_device *ddev,
                       struct pci_dev *pdev,
@@ -2631,6 +2651,10 @@ void r100_pll_errata_after_index(struct radeon_device *rdev);
 #define ASIC_IS_DCE64(rdev) ((rdev->family == CHIP_OLAND))
 #define ASIC_IS_NODCE(rdev) ((rdev->family == CHIP_HAINAN))
 #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE))
+#define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI))
+#define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE))
+#define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI) || \
+                            (rdev->family == CHIP_MULLINS))
 
 #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \
                              (rdev->ddev->pdev->device == 0x6850) || \
@@ -2733,9 +2757,8 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
 #define radeon_pm_finish(rdev) (rdev)->asic->pm.finish((rdev))
 #define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev))
 #define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev))
-#define radeon_pre_page_flip(rdev, crtc) (rdev)->asic->pflip.pre_page_flip((rdev), (crtc))
 #define radeon_page_flip(rdev, crtc, base) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base))
-#define radeon_post_page_flip(rdev, crtc) (rdev)->asic->pflip.post_page_flip((rdev), (crtc))
+#define radeon_page_flip_pending(rdev, crtc) (rdev)->asic->pflip.page_flip_pending((rdev), (crtc))
 #define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc))
 #define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev))
 #define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev))