drm/radeon/kms: add voltage type to atom set voltage function
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / radeon_pm.c
index 2aed03bde4b2ad3bf40963d7acc1f66afa843da2..4010571def3aff813e37a11b14d31d6a71071be9 100644 (file)
@@ -23,6 +23,7 @@
 #include "drmP.h"
 #include "radeon.h"
 #include "avivod.h"
+#include "atom.h"
 #ifdef CONFIG_ACPI
 #include <linux/acpi.h>
 #endif
@@ -365,12 +366,14 @@ static ssize_t radeon_set_pm_profile(struct device *dev,
                else if (strncmp("high", buf, strlen("high")) == 0)
                        rdev->pm.profile = PM_PROFILE_HIGH;
                else {
-                       DRM_ERROR("invalid power profile!\n");
+                       count = -EINVAL;
                        goto fail;
                }
                radeon_pm_update_profile(rdev);
                radeon_pm_set_clocks(rdev);
-       }
+       } else
+               count = -EINVAL;
+
 fail:
        mutex_unlock(&rdev->pm.mutex);
 
@@ -413,7 +416,7 @@ static ssize_t radeon_set_pm_method(struct device *dev,
                mutex_unlock(&rdev->pm.mutex);
                cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
        } else {
-               DRM_ERROR("invalid power method!\n");
+               count = -EINVAL;
                goto fail;
        }
        radeon_pm_compute_clocks(rdev);
@@ -533,7 +536,8 @@ void radeon_pm_resume(struct radeon_device *rdev)
        /* set up the default clocks if the MC ucode is loaded */
        if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) {
                if (rdev->pm.default_vddc)
-                       radeon_atom_set_voltage(rdev, rdev->pm.default_vddc);
+                       radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
+                                               SET_VOLTAGE_TYPE_ASIC_VDDC);
                if (rdev->pm.default_sclk)
                        radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
                if (rdev->pm.default_mclk)
@@ -583,7 +587,8 @@ int radeon_pm_init(struct radeon_device *rdev)
                /* set up the default clocks if the MC ucode is loaded */
                if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) {
                        if (rdev->pm.default_vddc)
-                               radeon_atom_set_voltage(rdev, rdev->pm.default_vddc);
+                               radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
+                                                       SET_VOLTAGE_TYPE_ASIC_VDDC);
                        if (rdev->pm.default_sclk)
                                radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
                        if (rdev->pm.default_mclk)