drm/rockchip: vop: fix vtotal calc mistake on interlace mode

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / rockchip / rockchip_drm_vop.c

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index ae53285ba855b80a40b17ac17410b84c105cca2e..7c125decacc0ec6f1f8b863441685d8d891564b0 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -359,6 +359,17 @@ static enum vop_data_format vop_convert_format(uint32_t format)
        }
 }
 
+static bool is_yuv_output(uint32_t bus_format)
+{
+       switch (bus_format) {
+       case MEDIA_BUS_FMT_YUV8_1X24:
+       case MEDIA_BUS_FMT_YUV10_1X30:
+               return true;
+       default:
+               return false;
+       }
+}
+
 static bool is_yuv_support(uint32_t format)
 {
        switch (format) {
@@ -628,15 +639,18 @@ static int vop_csc_atomic_check(struct drm_crtc *crtc,
 {
        struct vop *vop = to_vop(crtc);
        struct drm_atomic_state *state = crtc_state->state;
+       struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
        const struct vop_csc_table *csc_table = vop->data->csc_table;
        struct drm_plane_state *pstate;
        struct drm_plane *plane;
-       bool is_yuv;
+       bool is_input_yuv, is_output_yuv;
        int ret;
 
        if (!csc_table)
                return 0;
 
+       is_output_yuv = is_yuv_output(s->bus_format);
+
        drm_atomic_crtc_state_for_each_plane(plane, crtc_state) {
                struct vop_plane_state *vop_plane_state;
 
@@ -647,12 +661,12 @@ static int vop_csc_atomic_check(struct drm_crtc *crtc,
 
                if (!pstate->fb)
                        continue;
-               is_yuv = is_yuv_support(pstate->fb->pixel_format);
+               is_input_yuv = is_yuv_support(pstate->fb->pixel_format);
 
                /*
                 * TODO: force set input and output csc mode.
                 */
-               ret = vop_csc_setup(csc_table, is_yuv, false,
+               ret = vop_csc_setup(csc_table, is_input_yuv, is_output_yuv,
                                    CSC_BT709, CSC_BT709,
                                    &vop_plane_state->y2r_table,
                                    &vop_plane_state->r2r_table,
@@ -811,7 +825,9 @@ static void vop_initial(struct drm_crtc *crtc)
         */
        for (i = 0; i < vop->num_wins; i++) {
                struct vop_win *win = &vop->win[i];
+               int channel = i * 2 + 1;
 
+               VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel);
                if (win->phy->scl && win->phy->scl->ext) {
                        VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, SCALE_NONE);
                        VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, SCALE_NONE);
@@ -910,6 +926,7 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
                                        DRM_PLANE_HELPER_NO_SCALING;
        unsigned long offset;
        dma_addr_t dma_addr;
+       u16 vdisplay;
 
        crtc = crtc ? crtc : plane->state->crtc;
        /*
@@ -931,10 +948,14 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
        dest->x2 = state->crtc_x + state->crtc_w;
        dest->y2 = state->crtc_y + state->crtc_h;
 
+       vdisplay = crtc_state->adjusted_mode.crtc_vdisplay;
+       if (crtc_state->adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
+               vdisplay *= 2;
+
        clip.x1 = 0;
        clip.y1 = 0;
-       clip.x2 = crtc_state->mode.hdisplay;
-       clip.y2 = crtc_state->mode.vdisplay;
+       clip.x2 = crtc_state->adjusted_mode.crtc_hdisplay;
+       clip.y2 = vdisplay;
 
        ret = drm_plane_helper_check_update(plane, crtc, state->fb,
                                            src, dest, &clip,
@@ -968,8 +989,10 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
         * Src.x1 can be odd when do clip, but yuv plane start point
         * need align with 2 pixel.
         */
-       if (is_yuv_support(fb->pixel_format) && ((src->x1 >> 16) % 2))
+       if (is_yuv_support(fb->pixel_format) && ((src->x1 >> 16) % 2)) {
+               DRM_ERROR("Invalid Source: Yuv format Can't support odd xpos\n");
                return -EINVAL;
+       }
 
        offset = (src->x1 >> 16) * drm_format_plane_bpp(fb->pixel_format, 0) / 8;
        if (state->rotation & BIT(DRM_REFLECT_Y))
@@ -1124,7 +1147,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
        if (win->csc) {
                vop_load_csc_table(vop, win->csc->y2r_offset, y2r_table);
                vop_load_csc_table(vop, win->csc->r2r_offset, r2r_table);
-               vop_load_csc_table(vop, win->csc->r2r_offset, r2y_table);
+               vop_load_csc_table(vop, win->csc->r2y_offset, r2y_table);
                VOP_WIN_SET_EXT(vop, win, csc, y2r_en, !!y2r_table);
                VOP_WIN_SET_EXT(vop, win, csc, r2r_en, !!r2r_table);
                VOP_WIN_SET_EXT(vop, win, csc, r2y_en, !!r2y_table);
@@ -1442,20 +1465,23 @@ static const struct rockchip_crtc_funcs private_crtc_funcs = {
 
 static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
                                const struct drm_display_mode *mode,
-                               struct drm_display_mode *adjusted_mode)
+                               struct drm_display_mode *adj_mode)
 {
        struct vop *vop = to_vop(crtc);
        const struct vop_data *vop_data = vop->data;
-       int request_clock = mode->clock;
 
        if (mode->hdisplay > vop_data->max_output.width ||
            mode->vdisplay > vop_data->max_output.height)
                return false;
 
+       drm_mode_set_crtcinfo(adj_mode,
+                             CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE);
+
        if (mode->flags & DRM_MODE_FLAG_DBLCLK)
-               request_clock *= 2;
-       adjusted_mode->crtc_clock =
-               clk_round_rate(vop->dclk, request_clock * 1000) / 1000;
+               adj_mode->crtc_clock *= 2;
+
+       adj_mode->crtc_clock =
+               clk_round_rate(vop->dclk, adj_mode->crtc_clock * 1000) / 1000;
 
        return true;
 }
@@ -1525,17 +1551,30 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
        case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
                val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
                break;
+       case MEDIA_BUS_FMT_YUV8_1X24:
+               val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(1);
+               break;
+       case MEDIA_BUS_FMT_YUV10_1X30:
+               val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
+               break;
        case MEDIA_BUS_FMT_RGB888_1X24:
        default:
                val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
                break;
        }
+
        if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA)
                val |= PRE_DITHER_DOWN_EN(0);
        else
                val |= PRE_DITHER_DOWN_EN(1);
        val |= DITHER_DOWN_MODE_SEL(DITHER_DOWN_ALLEGRO);
        VOP_CTRL_SET(vop, dither_down, val);
+       VOP_CTRL_SET(vop, dclk_ddr,
+                    s->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0);
+       VOP_CTRL_SET(vop, overlay_mode, is_yuv_output(s->bus_format));
+       VOP_CTRL_SET(vop, dsp_out_yuv, is_yuv_output(s->bus_format));
+       VOP_CTRL_SET(vop, dsp_background,
+                    is_yuv_output(s->bus_format) ? 0x20010200 : 0);
 
        VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
        val = hact_st << 16;
@@ -1543,7 +1582,6 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
        VOP_CTRL_SET(vop, hact_st_end, val);
        VOP_CTRL_SET(vop, hpost_st_end, val);
 
-       VOP_CTRL_SET(vop, vtotal_pw, (adjusted_mode->vtotal << 16) | vsync_len);
        val = vact_st << 16;
        val |= vact_end;
        VOP_CTRL_SET(vop, vact_st_end, val);
@@ -1560,10 +1598,12 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
                VOP_CTRL_SET(vop, vs_st_end_f1, val);
                VOP_CTRL_SET(vop, dsp_interlace, 1);
                VOP_CTRL_SET(vop, p2i_en, 1);
+               vtotal += vtotal + 1;
        } else {
                VOP_CTRL_SET(vop, dsp_interlace, 0);
                VOP_CTRL_SET(vop, p2i_en, 0);
        }
+       VOP_CTRL_SET(vop, vtotal_pw, vtotal << 16 | vsync_len);
 
        VOP_CTRL_SET(vop, core_dclk_div,
                     !!(adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK));