CMD_FWVERSION = 0x35,
- CMD_TUNER_INIT = 0x3c, /* cmd.len = 0x03; */
+ CMD_BER_CTRL = 0x3c, /* cmd.len = 0x03; */
};
#define CX24120_MAX_CMD_LEN 30
#define CX24120_STATUS_MASK 0x0f
#define CX24120_SIGNAL_MASK 0xc0
+/* ber window */
+#define CX24120_BER_WINDOW 16
+#define CX24120_BER_WSIZE ((1 << CX24120_BER_WINDOW) * 208 * 8)
+
#define info(args...) pr_info("cx24120: " args)
#define err(args...) pr_err("cx24120: ### ERROR: " args)
struct cx24120_tuning {
u32 frequency;
u32 symbol_rate;
- fe_spectral_inversion_t inversion;
- fe_code_rate_t fec;
+ enum fe_spectral_inversion inversion;
+ enum fe_code_rate fec;
- fe_delivery_system_t delsys;
- fe_modulation_t modulation;
- fe_pilot_t pilot;
+ enum fe_delivery_system delsys;
+ enum fe_modulation modulation;
+ enum fe_pilot pilot;
/* Demod values */
u8 fec_val;
struct cx24120_tuning dcur;
struct cx24120_tuning dnxt;
- fe_status_t fe_status;
+ enum fe_status fe_status;
+
+ /* dvbv5 stats calculations */
+ u32 bitrate;
+ u32 berw_usecs;
+ u32 ber_prev;
+ u32 ucb_offset;
+ unsigned long ber_jiffies_stats;
+ unsigned long per_jiffies_stats;
};
/* Command message to firmware */
static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
{
struct cx24120_state *state = fe->demodulator_priv;
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+
+ if (c->post_bit_error.stat[0].scale != FE_SCALE_COUNTER) {
+ *ber = 0;
+ return 0;
+ }
- *ber = (cx24120_readreg(state, CX24120_REG_BER_HH) << 24) |
- (cx24120_readreg(state, CX24120_REG_BER_HL) << 16) |
- (cx24120_readreg(state, CX24120_REG_BER_LH) << 8) |
- cx24120_readreg(state, CX24120_REG_BER_LL);
- dev_dbg(&state->i2c->dev, "read BER index = %d\n", *ber);
+ *ber = c->post_bit_error.stat[0].uvalue - state->ber_prev;
+ state->ber_prev = c->post_bit_error.stat[0].uvalue;
return 0;
}
static int cx24120_message_send(struct cx24120_state *state,
struct cx24120_cmd *cmd)
{
- int ret, ficus;
+ int ficus;
if (state->mpeg_enabled) {
/* Disable mpeg out on certain commands */
cx24120_check_cmd(state, cmd->id);
}
- ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
- ret = cx24120_writeregs(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
- cmd->len, 1);
- ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
+ cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
+ cx24120_writeregs(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
+ cmd->len, 1);
+ cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
ficus = 1000;
while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
}
static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
- fe_sec_mini_cmd_t burst)
+ enum fe_sec_mini_cmd burst)
{
struct cx24120_state *state = fe->demodulator_priv;
struct cx24120_cmd cmd;
return cx24120_message_send(state, &cmd);
}
-static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
+static int cx24120_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
{
struct cx24120_state *state = fe->demodulator_priv;
struct cx24120_cmd cmd;
}
static int cx24120_set_voltage(struct dvb_frontend *fe,
- fe_sec_voltage_t voltage)
+ enum fe_sec_voltage voltage)
{
struct cx24120_state *state = fe->demodulator_priv;
struct cx24120_cmd cmd;
struct dvb_frontend *fe = &state->frontend;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct cx24120_cmd cmd;
- int ret, cnr;
- u16 sig;
+ int ret, cnr, msecs;
+ u16 sig, ucb;
+ u32 ber;
dev_dbg(&state->i2c->dev, "\n");
c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
}
- /* FIXME: add UCB/BER */
+ /* BER & UCB require lock */
+ if (!(state->fe_status & FE_HAS_LOCK)) {
+ c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ return;
+ }
+
+ /* BER */
+ if (time_after(jiffies, state->ber_jiffies_stats)) {
+ msecs = (state->berw_usecs + 500) / 1000;
+ state->ber_jiffies_stats = jiffies + msecs_to_jiffies(msecs);
+
+ ber = cx24120_readreg(state, CX24120_REG_BER_HH) << 24;
+ ber |= cx24120_readreg(state, CX24120_REG_BER_HL) << 16;
+ ber |= cx24120_readreg(state, CX24120_REG_BER_LH) << 8;
+ ber |= cx24120_readreg(state, CX24120_REG_BER_LL);
+ dev_dbg(&state->i2c->dev, "read BER index = %d\n", ber);
+
+ c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
+ c->post_bit_error.stat[0].uvalue += ber;
+
+ c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
+ c->post_bit_count.stat[0].uvalue += CX24120_BER_WSIZE;
+ }
+
+ /* UCB */
+ if (time_after(jiffies, state->per_jiffies_stats)) {
+ state->per_jiffies_stats = jiffies + msecs_to_jiffies(1000);
+
+ ucb = cx24120_readreg(state, CX24120_REG_UCB_H) << 8;
+ ucb |= cx24120_readreg(state, CX24120_REG_UCB_L);
+ dev_dbg(&state->i2c->dev, "ucblocks = %d\n", ucb);
+
+ /* handle reset */
+ if (ucb < state->ucb_offset)
+ state->ucb_offset = c->block_error.stat[0].uvalue;
+
+ c->block_error.stat[0].scale = FE_SCALE_COUNTER;
+ c->block_error.stat[0].uvalue = ucb + state->ucb_offset;
+
+ c->block_count.stat[0].scale = FE_SCALE_COUNTER;
+ c->block_count.stat[0].uvalue += state->bitrate / 8 / 208;
+ }
}
static void cx24120_set_clock_ratios(struct dvb_frontend *fe);
/* Read current tuning status */
-static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
+static int cx24120_read_status(struct dvb_frontend *fe, enum fe_status *status)
{
struct cx24120_state *state = fe->demodulator_priv;
int lock;
* Used for decoding the REG_FECMODE register
* once tuned in.
*/
-static struct cx24120_modfec {
- fe_delivery_system_t delsys;
- fe_modulation_t mod;
- fe_code_rate_t fec;
+struct cx24120_modfec {
+ enum fe_delivery_system delsys;
+ enum fe_modulation mod;
+ enum fe_code_rate fec;
u8 val;
-} modfec_lookup_table[] = {
+};
+
+static const struct cx24120_modfec modfec_lookup_table[] = {
/*delsys mod fec val */
{ SYS_DVBS, QPSK, FEC_1_2, 0x01 },
{ SYS_DVBS, QPSK, FEC_2_3, 0x02 },
return 0;
}
+/* Calculate ber window time */
+static void cx24120_calculate_ber_window(struct cx24120_state *state, u32 rate)
+{
+ struct dvb_frontend *fe = &state->frontend;
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+ u64 tmp;
+
+ /*
+ * Calculate bitrate from rate in the clock ratios table.
+ * This isn't *exactly* right but close enough.
+ */
+ tmp = (u64)c->symbol_rate * rate;
+ do_div(tmp, 256);
+ state->bitrate = tmp;
+
+ /* usecs per ber window */
+ tmp = 1000000ULL * CX24120_BER_WSIZE;
+ do_div(tmp, state->bitrate);
+ state->berw_usecs = tmp;
+
+ dev_dbg(&state->i2c->dev, "bitrate: %u, berw_usecs: %u\n",
+ state->bitrate, state->berw_usecs);
+}
+
/*
* Clock ratios lookup table
*
* There's probably some way of calculating these but I
* can't determine the pattern
*/
-static struct cx24120_clock_ratios_table {
- fe_delivery_system_t delsys;
- fe_pilot_t pilot;
- fe_modulation_t mod;
- fe_code_rate_t fec;
+struct cx24120_clock_ratios_table {
+ enum fe_delivery_system delsys;
+ enum fe_pilot pilot;
+ enum fe_modulation mod;
+ enum fe_code_rate fec;
u32 m_rat;
u32 n_rat;
u32 rate;
-} clock_ratios_table[] = {
+};
+
+static const struct cx24120_clock_ratios_table clock_ratios_table[] = {
/*delsys pilot mod fec m_rat n_rat rate */
{ SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
{ SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
cx24120_message_send(state, &cmd);
+
+ /* Calculate ber window rates for stat work */
+ cx24120_calculate_ber_window(state, clock_ratios_table[idx].rate);
}
/* Set inversion value */
static int cx24120_set_inversion(struct cx24120_state *state,
- fe_spectral_inversion_t inversion)
+ enum fe_spectral_inversion inversion)
{
dev_dbg(&state->i2c->dev, "(%d)\n", inversion);
return 0;
}
-/*
- * FEC lookup table for tuning Some DVB-S2 val's have been found by
- * trial and error. Sofar it seems to match up with the contents of
- * the REG_FECMODE after tuning The rest will probably be the same but
- * would need testing. Anything not in the table will run with
- * FEC_AUTO and take a while longer to tune in ( c.500ms instead of
- * 30ms )
- */
-static struct cx24120_modfec_table {
- fe_delivery_system_t delsys;
- fe_modulation_t mod;
- fe_code_rate_t fec;
+/* FEC lookup table for tuning */
+struct cx24120_modfec_table {
+ enum fe_delivery_system delsys;
+ enum fe_modulation mod;
+ enum fe_code_rate fec;
u8 val;
-} modfec_table[] = {
- /*delsys mod fec val */
- { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
- { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
- { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
- { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
- { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
- { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
-
- { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
-
- { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
- { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
+};
+
+static const struct cx24120_modfec_table modfec_table[] = {
+ /*delsys mod fec val */
+ { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
+ { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
+ { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
+ { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
+ { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
+ { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
+
+ { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
+ { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
+ { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
+ { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
+ { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
+ { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
+ { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
+ { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
+
+ { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
+ { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
+ { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
+ { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
+ { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
+ { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
};
/* Set fec_val & fec_mask values from delsys, modulation & fec */
-static int cx24120_set_fec(struct cx24120_state *state, fe_modulation_t mod,
- fe_code_rate_t fec)
+static int cx24120_set_fec(struct cx24120_state *state, enum fe_modulation mod,
+ enum fe_code_rate fec)
{
int idx;
}
/* Set pilot */
-static int cx24120_set_pilot(struct cx24120_state *state, fe_pilot_t pilot)
+static int cx24120_set_pilot(struct cx24120_state *state, enum fe_pilot pilot)
{
dev_dbg(&state->i2c->dev, "(%d)\n", pilot);
return cx24120_message_send(state, &cmd);
}
-int cx24120_init(struct dvb_frontend *fe)
+static int cx24120_init(struct dvb_frontend *fe)
{
const struct firmware *fw;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
return -EREMOTEIO;
}
- /* ???? */
- cmd.id = CMD_TUNER_INIT;
+ /* Set size of BER window */
+ cmd.id = CMD_BER_CTRL;
cmd.len = 3;
cmd.arg[0] = 0x00;
- cmd.arg[1] = 0x10;
- cmd.arg[2] = 0x10;
+ cmd.arg[1] = CX24120_BER_WINDOW;
+ cmd.arg[2] = CX24120_BER_WINDOW;
if (cx24120_message_send(state, &cmd)) {
- err("Error sending final init message. :(\n");
+ err("Error setting ber window\n");
return -EREMOTEIO;
}
c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
c->cnr.len = 1;
c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->post_bit_error.len = 1;
+ c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->post_bit_count.len = 1;
+ c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->block_error.len = 1;
+ c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->block_count.len = 1;
+ c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
state->cold_init = 1;
+
return 0;
}
static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
unsigned int mode_flags, unsigned int *delay,
- fe_status_t *status)
+ enum fe_status *status)
{
struct cx24120_state *state = fe->demodulator_priv;
int ret;
static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
struct cx24120_state *state = fe->demodulator_priv;
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+
+ if (c->block_error.stat[0].scale != FE_SCALE_COUNTER) {
+ *ucblocks = 0;
+ return 0;
+ }
- *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
- cx24120_readreg(state, CX24120_REG_UCB_L);
+ *ucblocks = c->block_error.stat[0].uvalue - state->ucb_offset;
- dev_dbg(&state->i2c->dev, "ucblocks = %d\n", *ucblocks);
return 0;
}
projects / firefly-linux-kernel-4.4.55.git / blobdiff