rk3368 camera: hold vio0 noc clock during the camera work, fixed isp iommu stall...
[firefly-linux-kernel-4.4.55.git] / drivers / media / video / rk_camsys / camsys_marvin.c
index a7544ca3080cf24b0c5d962d1bdef65d52694ffb..a841b03af965df0456699f131129f094e6e5e940 100755 (executable)
@@ -302,7 +302,7 @@ static int camsys_mrv_reset_cb(void *ptr,unsigned int on)
     if (camsys_dev->soc) {
         soc = (camsys_soc_priv_t*)camsys_dev->soc;
         if (soc->soc_cfg) {
-            (soc->soc_cfg)(Isp_SoftRst,(void*)on);
+            (soc->soc_cfg)(Isp_SoftRst,(void*)(unsigned long)on);
         } else {
             camsys_err("camsys_dev->soc->soc_cfg is NULL!");
         }
@@ -331,14 +331,20 @@ static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
                clk_set_rate(clk->isp,isp_clk);
         clk_set_rate(clk->isp_jpe, isp_clk);
 
+               clk_prepare_enable(clk->pd_isp);
         clk_prepare_enable(clk->aclk_isp);
         clk_prepare_enable(clk->hclk_isp);
         clk_prepare_enable(clk->isp);
         clk_prepare_enable(clk->isp_jpe);
-        clk_prepare_enable(clk->clk_mipi_24m); 
         clk_prepare_enable(clk->pclkin_isp); 
-               clk_prepare_enable(clk->pd_isp);
+               if(CHIP_TYPE == 3368){
 
+                       clk_prepare_enable(clk->cif_clk_out);
+                       clk_prepare_enable(clk->pclk_dphyrx);
+                       clk_prepare_enable(clk->clk_vio0_noc);
+               }else{
+                       clk_prepare_enable(clk->clk_mipi_24m);          
+               }
         clk->in_on = true;
 
         camsys_trace(1, "%s clock(f: %ld Hz) in turn on",dev_name(camsys_dev->miscdev.this_device),isp_clk);
@@ -352,8 +358,15 @@ static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
         clk_disable_unprepare(clk->hclk_isp);
         clk_disable_unprepare(clk->isp);
         clk_disable_unprepare(clk->isp_jpe);
-        clk_disable_unprepare(clk->clk_mipi_24m); 
-        clk_disable_unprepare(clk->pclkin_isp); 
+        clk_disable_unprepare(clk->pclkin_isp);
+               if(CHIP_TYPE == 3368){
+               clk_disable_unprepare(clk->cif_clk_out);
+                       clk_disable_unprepare(clk->pclk_dphyrx);
+                       clk_disable_unprepare(clk->clk_vio0_noc);
+
+               }else{
+               clk_disable_unprepare(clk->clk_mipi_24m); 
+               }
                clk_disable_unprepare(clk->pd_isp);
 
                rockchip_clear_system_status(SYS_STATUS_ISP);
@@ -521,6 +534,9 @@ static int camsys_mrv_remove_cb(struct platform_device *pdev)
         if (!IS_ERR_OR_NULL(mrv_clk->cif_clk_out)) {
             devm_clk_put(&pdev->dev,mrv_clk->cif_clk_out);
         }
+        if (!IS_ERR_OR_NULL(mrv_clk->clk_vio0_noc)) {
+            devm_clk_put(&pdev->dev,mrv_clk->clk_vio0_noc);
+        }
 
         kfree(mrv_clk);
         mrv_clk = NULL;
@@ -546,25 +562,45 @@ int camsys_mrv_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev)
         err = -EINVAL;
         goto clk_failed;
     }
-     
-    mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp");
-    mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
-    mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
-    mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
-    mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
-    mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
-    mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
-    mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
-    mrv_clk->clk_mipi_24m = devm_clk_get(&pdev->dev,"clk_mipi_24m"); 
-    
-       if (IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
-        IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) || 
-        IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->clk_mipi_24m)) {
-        camsys_err("Get %s clock resouce failed!\n",miscdev_name);
-        err = -EINVAL;
-        goto clk_failed;
-    }
-    
+    if(CHIP_TYPE == 3368){
+           mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp");
+           mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
+           mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
+           mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
+           mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
+           mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
+           mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
+           mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
+           mrv_clk->pclk_dphyrx = devm_clk_get(&pdev->dev, "pclk_dphyrx");    
+           mrv_clk->clk_vio0_noc = devm_clk_get(&pdev->dev, "clk_vio0_noc");
+
+               if (IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
+               IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) || 
+               IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)||
+               IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->clk_vio0_noc)) {
+               camsys_err("Get %s clock resouce failed!\n",miscdev_name);
+               err = -EINVAL;
+               goto clk_failed;
+           }
+    }else{
+           mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp");
+           mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
+           mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
+           mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
+           mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
+           mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
+           mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
+           mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
+           mrv_clk->clk_mipi_24m = devm_clk_get(&pdev->dev,"clk_mipi_24m"); 
+           
+               if (IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
+               IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) || 
+               IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->clk_mipi_24m)) {
+               camsys_err("Get %s clock resouce failed!\n",miscdev_name);
+               err = -EINVAL;
+               goto clk_failed;
+           }
+       }
     clk_set_rate(mrv_clk->isp,210000000);
     clk_set_rate(mrv_clk->isp_jpe, 210000000);
     
@@ -626,6 +662,14 @@ clk_failed:
         if (!IS_ERR_OR_NULL(mrv_clk->cif_clk_out)) {
             clk_put(mrv_clk->cif_clk_out);
         }
+               if(CHIP_TYPE == 3368){
+               if (!IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)) {
+                   clk_put(mrv_clk->pclk_dphyrx);
+               }
+               if (!IS_ERR_OR_NULL(mrv_clk->clk_vio0_noc)) {
+                       clk_put(mrv_clk->clk_vio0_noc);
+               }
+               }
 
         kfree(mrv_clk);
         mrv_clk = NULL;