Merge branch 'linux-linaro-lsk-v4.4-android' of git://git.linaro.org/kernel/linux...

[firefly-linux-kernel-4.4.55.git] / drivers / media / video / rk_camsys / camsys_soc_rk3368.h

diff --git a/drivers/media/video/rk_camsys/camsys_soc_rk3368.h b/drivers/media/video/rk_camsys/camsys_soc_rk3368.h
index 47efb19d2fcf5651f354e83b5a5eaf3c6bb5925d..12ec006284e32e2f490c93d20ea9fc6718e3933a 100644 (file)
--- a/drivers/media/video/rk_camsys/camsys_soc_rk3368.h
+++ b/drivers/media/video/rk_camsys/camsys_soc_rk3368.h
@@ -8,7 +8,7 @@
 #define MRV_MIPI_CTRL                           0x00
 
 /*
-#define CSIHOST_PHY_TEST_CTRL0_OFFSET 0x0030
+*#define CSIHOST_PHY_TEST_CTRL0_OFFSET 0x0030
 #define DPHY_TX1RX1_TESTCLR    (1<<0)
 #define DPHY_TX1RX1_TESTCLK    (1<<1)
 
@@ -42,16 +42,16 @@
 */
 #define GRF_SOC_CON6_OFFSET    (0x0418)
 /*bit 0*/
-#define MIPI_PHY_DISABLE_ISP_MASK       (0x1<<16)
-#define MIPI_PHY_DISABLE_ISP            (0x0<<0)
+#define MIPI_PHY_DISABLE_ISP_MASK       (0x1 << 16)
+#define MIPI_PHY_DISABLE_ISP            (0x0 << 0)
 /*bit 1*/
-#define ISP_MIPI_CSI_HOST_SEL_OFFSET_MASK       (0x1<<17)
+#define ISP_MIPI_CSI_HOST_SEL_OFFSET_MASK       (0x1 << 17)
 #define ISP_MIPI_CSI_HOST_SEL_OFFSET_BIT       (0x1)
 /*bit 6*/
-#define DPHY_RX_CLK_INV_SEL_MASK  (0x1<<22)
-#define DPHY_RX_CLK_INV_SEL   (0x1<<6)
+#define DPHY_RX_CLK_INV_SEL_MASK  (0x1 << 22)
+#define DPHY_RX_CLK_INV_SEL   (0x1 << 6)
 /*bit 11:8*/
-#define DPHY_RX_FORCERXMODE_OFFSET_MASK     (0xF<<24)
+#define DPHY_RX_FORCERXMODE_OFFSET_MASK     (0xF << 24)
 #define DPHY_RX_FORCERXMODE_OFFSET_BITS   (8)
 
 /*GRF_SOC_CON7*/
@@ -59,13 +59,13 @@
 #define GRF_SOC_CON7_OFFSET  (0x041c)
 /*bit 10:7*/
 #define FORCETXSTOPMODE_OFFSET_BITS   (7)
-#define FORCETXSTOPMODE_MASK   (0xF<<23)
+#define FORCETXSTOPMODE_MASK   (0xF << 23)
 
 #define DPHY_TX0_FORCERXMODE   (6)
-#define DPHY_TX0_FORCERXMODE_MASK   (0x01<<22)
+#define DPHY_TX0_FORCERXMODE_MASK   (0x01 << 22)
 /*bit 5*/
 #define LANE0_TURNDISABLE_BITS  (5)
-#define LANE0_TURNDISABLE_MASK  (0x01<<21)
+#define LANE0_TURNDISABLE_MASK  (0x01 << 21)
 
 #define GRF_SOC_STATUS13  (0x04b4)
 /*dphy_rx_rxclkactivehs*/
@@ -92,20 +92,28 @@
 #define CSIHOST_N_LANES_OFFSET 0x04
 #define CSIHOST_N_LANES_OFFSET_BIT (0)
 
-#define write_grf_reg(addr, val)           __raw_writel(val, (void*)(addr+rk_grf_base)) //__raw_writel(val, addr+RK_GRF_VIRT)
-#define read_grf_reg(addr)                 __raw_readl((void*)(addr+rk_grf_base)) //__raw_readl(addr+RK_GRF_VIRT)
-#define mask_grf_reg(addr, msk, val)       write_grf_reg(addr,(val)|((~(msk))&read_grf_reg(addr)))
+#define write_grf_reg(addr, val)           \
+       __raw_writel(val, (void *)(addr + para->camsys_dev->rk_grf_base))
+#define read_grf_reg(addr)                 \
+       __raw_readl((void *)(addr + para->camsys_dev->rk_grf_base))
+#define mask_grf_reg(addr, msk, val)       \
+       write_grf_reg(addr, (val) | ((~(msk)) & read_grf_reg(addr)))
 
-#define write_cru_reg(addr, val)           __raw_writel(val, (void*)(addr+rk_cru_base))
+#define write_cru_reg(addr, val)           \
+       __raw_writel(val, (void *)(addr + para->camsys_dev->rk_cru_base))
 
 /*#define cru_writel(v, o)     do {writel(v, RK_CRU_VIRT + (o)); dsb();} \
-                               while (0)
+*                              while (0)
 */
 
-#define write_csihost_reg(addr, val)       __raw_writel(val, (void*)(addr+phy_virt))//__raw_writel(val, addr+IOMEM(phy_virt))
-#define read_csihost_reg(addr)             __raw_readl((void*)(addr+phy_virt))//__raw_readl(addr+IOMEM(phy_virt))
+#define write_csihost_reg(addr, val)       \
+       __raw_writel(val, (void *)(addr + phy_virt))
+#define read_csihost_reg(addr)             \
+       __raw_readl((void *)(addr + phy_virt))
 /*csi phy*/
-#define write_csiphy_reg(addr, val)       __raw_writel(val, (void*)(addr+csiphy_virt))//__raw_writel(val, addr+IOMEM(csiphy_virt))
-#define read_csiphy_reg(addr)             __raw_readl((void*)(addr+csiphy_virt))//__raw_readl(addr+IOMEM(csiphy_virt))
+#define write_csiphy_reg(addr, val)       \
+       __raw_writel(val, (void *)(addr + csiphy_virt))
+#define read_csiphy_reg(addr)             \
+       __raw_readl((void *)(addr + csiphy_virt))
 
 #endif