Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

[firefly-linux-kernel-4.4.55.git] / drivers / net / ethernet / intel / e1000e / 80003es2lan.c

diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
index e0991388664c9322a11449b994d62d4bc888ef63..b71c8502a2b347d8c770ac723d659a6115127e35 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/80003es2lan.c
+++ b/drivers/net/ethernet/intel/e1000e/80003es2lan.c
@@ -37,7 +37,9 @@
  * "index + 5".
  */
 static const u16 e1000_gg82563_cable_length_table[] = {
-        0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF };
+       0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF
+};
+
 #define GG82563_CABLE_LENGTH_TABLE_SIZE \
                ARRAY_SIZE(e1000_gg82563_cable_length_table)
 
@@ -116,7 +118,7 @@ static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
        nvm->type = e1000_nvm_eeprom_spi;
 
        size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
-                         E1000_EECD_SIZE_EX_SHIFT);
+                    E1000_EECD_SIZE_EX_SHIFT);
 
        /* Added to a constant, "size" becomes the left-shift value
         * for setting word_size.
@@ -393,7 +395,7 @@ static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
                 * before the device has completed the "Page Select" MDI
                 * transaction.  So we wait 200us after each MDI command...
                 */
-               udelay(200);
+               usleep_range(200, 400);
 
                /* ...and verify the command was successful. */
                ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
@@ -403,17 +405,17 @@ static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
                        return -E1000_ERR_PHY;
                }
 
-               udelay(200);
+               usleep_range(200, 400);
 
                ret_val = e1000e_read_phy_reg_mdic(hw,
-                                                 MAX_PHY_REG_ADDRESS & offset,
-                                                 data);
+                                                  MAX_PHY_REG_ADDRESS & offset,
+                                                  data);
 
-               udelay(200);
+               usleep_range(200, 400);
        } else {
                ret_val = e1000e_read_phy_reg_mdic(hw,
-                                                 MAX_PHY_REG_ADDRESS & offset,
-                                                 data);
+                                                  MAX_PHY_REG_ADDRESS & offset,
+                                                  data);
        }
 
        e1000_release_phy_80003es2lan(hw);
@@ -462,7 +464,7 @@ static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
                 * before the device has completed the "Page Select" MDI
                 * transaction.  So we wait 200us after each MDI command...
                 */
-               udelay(200);
+               usleep_range(200, 400);
 
                /* ...and verify the command was successful. */
                ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
@@ -472,17 +474,17 @@ static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
                        return -E1000_ERR_PHY;
                }
 
-               udelay(200);
+               usleep_range(200, 400);
 
                ret_val = e1000e_write_phy_reg_mdic(hw,
-                                                 MAX_PHY_REG_ADDRESS & offset,
-                                                 data);
+                                                   MAX_PHY_REG_ADDRESS &
+                                                   offset, data);
 
-               udelay(200);
+               usleep_range(200, 400);
        } else {
                ret_val = e1000e_write_phy_reg_mdic(hw,
-                                                 MAX_PHY_REG_ADDRESS & offset,
-                                                 data);
+                                                   MAX_PHY_REG_ADDRESS &
+                                                   offset, data);
        }
 
        e1000_release_phy_80003es2lan(hw);
@@ -580,7 +582,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
                e_dbg("Waiting for forced speed/duplex link on GG82563 phy.\n");
 
                ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
-                                                    100000, &link);
+                                                     100000, &link);
                if (ret_val)
                        return ret_val;
 
@@ -595,7 +597,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
 
                /* Try once more */
                ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
-                                                    100000, &link);
+                                                     100000, &link);
                if (ret_val)
                        return ret_val;
        }
@@ -666,14 +668,12 @@ static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
        s32 ret_val;
 
        if (hw->phy.media_type == e1000_media_type_copper) {
-               ret_val = e1000e_get_speed_and_duplex_copper(hw,
-                                                                   speed,
-                                                                   duplex);
+               ret_val = e1000e_get_speed_and_duplex_copper(hw, speed, duplex);
                hw->phy.ops.cfg_on_link_up(hw);
        } else {
                ret_val = e1000e_get_speed_and_duplex_fiber_serdes(hw,
-                                                                 speed,
-                                                                 duplex);
+                                                                  speed,
+                                                                  duplex);
        }
 
        return ret_val;
@@ -754,9 +754,9 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
 
        /* Initialize identification LED */
        ret_val = mac->ops.id_led_init(hw);
+       /* An error is not fatal and we should not stop init due to this */
        if (ret_val)
                e_dbg("Error initializing identification LED\n");
-               /* This is not fatal and we should not stop init due to this */
 
        /* Disabling VLAN filtering */
        e_dbg("Initializing the IEEE VLAN\n");
@@ -784,14 +784,14 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
 
        /* Set the transmit descriptor write-back policy */
        reg_data = er32(TXDCTL(0));
-       reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
-                  E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
+       reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) |
+                   E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC);
        ew32(TXDCTL(0), reg_data);
 
        /* ...for both queues. */
        reg_data = er32(TXDCTL(1));
-       reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
-                  E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
+       reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) |
+                   E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC);
        ew32(TXDCTL(1), reg_data);
 
        /* Enable retransmit on late collisions */
@@ -818,13 +818,12 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
        /* default to true to enable the MDIC W/A */
        hw->dev_spec.e80003es2lan.mdic_wa_enable = true;
 
-       ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
-                                     E1000_KMRNCTRLSTA_OFFSET >>
-                                     E1000_KMRNCTRLSTA_OFFSET_SHIFT,
-                                     &i);
+       ret_val =
+           e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_OFFSET >>
+                                           E1000_KMRNCTRLSTA_OFFSET_SHIFT, &i);
        if (!ret_val) {
                if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) ==
-                    E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO)
+                   E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO)
                        hw->dev_spec.e80003es2lan.mdic_wa_enable = false;
        }
 
@@ -891,7 +890,7 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
 {
        struct e1000_phy_info *phy = &hw->phy;
        s32 ret_val;
-       u32 ctrl_ext;
+       u32 reg;
        u16 data;
 
        ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);
@@ -954,22 +953,19 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
        }
 
        /* Bypass Rx and Tx FIFO's */
-       ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
-                                       E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL,
-                                       E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS |
-                                       E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS);
+       reg = E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL;
+       data = (E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS |
+               E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS);
+       ret_val = e1000_write_kmrn_reg_80003es2lan(hw, reg, data);
        if (ret_val)
                return ret_val;
 
-       ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
-                                      E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
-                                      &data);
+       reg = E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE;
+       ret_val = e1000_read_kmrn_reg_80003es2lan(hw, reg, &data);
        if (ret_val)
                return ret_val;
        data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
-       ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
-                                       E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
-                                       data);
+       ret_val = e1000_write_kmrn_reg_80003es2lan(hw, reg, data);
        if (ret_val)
                return ret_val;
 
@@ -982,9 +978,9 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
        if (ret_val)
                return ret_val;
 
-       ctrl_ext = er32(CTRL_EXT);
-       ctrl_ext &= ~(E1000_CTRL_EXT_LINK_MODE_MASK);
-       ew32(CTRL_EXT, ctrl_ext);
+       reg = er32(CTRL_EXT);
+       reg &= ~E1000_CTRL_EXT_LINK_MODE_MASK;
+       ew32(CTRL_EXT, reg);
 
        ret_val = e1e_rphy(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
        if (ret_val)
@@ -1049,27 +1045,29 @@ static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
         * polling the phy; this fixes erroneous timeouts at 10Mbps.
         */
        ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 4),
-                                                  0xFFFF);
+                                                  0xFFFF);
        if (ret_val)
                return ret_val;
        ret_val = e1000_read_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
-                                                 &reg_data);
+                                                 &reg_data);
        if (ret_val)
                return ret_val;
        reg_data |= 0x3F;
        ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
-                                                  reg_data);
+                                                  reg_data);
        if (ret_val)
                return ret_val;
-       ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
-                                     E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
-                                     &reg_data);
+       ret_val =
+           e1000_read_kmrn_reg_80003es2lan(hw,
+                                           E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
+                                           &reg_data);
        if (ret_val)
                return ret_val;
        reg_data |= E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING;
-       ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
-                                       E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
-                                       reg_data);
+       ret_val =
+           e1000_write_kmrn_reg_80003es2lan(hw,
+                                            E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
+                                            reg_data);
        if (ret_val)
                return ret_val;
 
@@ -1096,7 +1094,7 @@ static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw)
 
        if (hw->phy.media_type == e1000_media_type_copper) {
                ret_val = e1000e_get_speed_and_duplex_copper(hw, &speed,
-                                                            &duplex);
+                                                            &duplex);
                if (ret_val)
                        return ret_val;
 
@@ -1125,9 +1123,10 @@ static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
        u16 reg_data, reg_data2;
 
        reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT;
-       ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
-                                      E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
-                                      reg_data);
+       ret_val =
+           e1000_write_kmrn_reg_80003es2lan(hw,
+                                            E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
+                                            reg_data);
        if (ret_val)
                return ret_val;
 
@@ -1171,9 +1170,10 @@ static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
        u32 i = 0;
 
        reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT;
-       ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
-                                      E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
-                                      reg_data);
+       ret_val =
+           e1000_write_kmrn_reg_80003es2lan(hw,
+                                            E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
+                                            reg_data);
        if (ret_val)
                return ret_val;
 
@@ -1220,7 +1220,7 @@ static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
                return ret_val;
 
        kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
-                      E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+                      E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
        ew32(KMRNCTRLSTA, kmrnctrlsta);
        e1e_flush();
 
@@ -1255,7 +1255,7 @@ static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
                return ret_val;
 
        kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
-                      E1000_KMRNCTRLSTA_OFFSET) | data;
+                      E1000_KMRNCTRLSTA_OFFSET) | data;
        ew32(KMRNCTRLSTA, kmrnctrlsta);
        e1e_flush();
 
@@ -1419,4 +1419,3 @@ const struct e1000_info e1000_es2_info = {
        .phy_ops                = &es2_phy_ops,
        .nvm_ops                = &es2_nvm_ops,
 };
-