Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[firefly-linux-kernel-4.4.55.git] / drivers / net / ethernet / renesas / sh_eth.h

diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 57b8e1fc5d15a088655d69783ffb293d2bf9ac7b..bae84fd2e73a7419504d8b29b195c0a118711b8a 100644 (file)
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -27,6 +27,10 @@
 #define TX_TIMEOUT     (5*HZ)
 #define TX_RING_SIZE   64      /* Tx ring size */
 #define RX_RING_SIZE   64      /* Rx ring size */
+#define TX_RING_MIN    64
+#define RX_RING_MIN    64
+#define TX_RING_MAX    1024
+#define RX_RING_MAX    1024
 #define ETHERSMALL             60
 #define PKT_BUF_SZ             1538
 #define SH_ETH_TSU_TIMEOUT_MS  500
@@ -585,71 +589,6 @@ enum RPADIR_BIT {
 /* FDR */
 #define DEFAULT_FDR_INIT       0x00000707
 
-enum phy_offsets {
-       PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3,
-       PHY_ANA = 4, PHY_ANL = 5, PHY_ANE = 6,
-       PHY_16 = 16,
-};
-
-/* PHY_CTRL */
-enum PHY_CTRL_BIT {
-       PHY_C_RESET = 0x8000, PHY_C_LOOPBK = 0x4000, PHY_C_SPEEDSL = 0x2000,
-       PHY_C_ANEGEN = 0x1000, PHY_C_PWRDN = 0x0800, PHY_C_ISO = 0x0400,
-       PHY_C_RANEG = 0x0200, PHY_C_DUPLEX = 0x0100, PHY_C_COLT = 0x0080,
-};
-#define DM9161_PHY_C_ANEGEN 0  /* auto nego special */
-
-/* PHY_STAT */
-enum PHY_STAT_BIT {
-       PHY_S_100T4 = 0x8000, PHY_S_100X_F = 0x4000, PHY_S_100X_H = 0x2000,
-       PHY_S_10T_F = 0x1000, PHY_S_10T_H = 0x0800, PHY_S_ANEGC = 0x0020,
-       PHY_S_RFAULT = 0x0010, PHY_S_ANEGA = 0x0008, PHY_S_LINK = 0x0004,
-       PHY_S_JAB = 0x0002, PHY_S_EXTD = 0x0001,
-};
-
-/* PHY_ANA */
-enum PHY_ANA_BIT {
-       PHY_A_NP = 0x8000, PHY_A_ACK = 0x4000, PHY_A_RF = 0x2000,
-       PHY_A_FCS = 0x0400, PHY_A_T4 = 0x0200, PHY_A_FDX = 0x0100,
-       PHY_A_HDX = 0x0080, PHY_A_10FDX = 0x0040, PHY_A_10HDX = 0x0020,
-       PHY_A_SEL = 0x001e,
-};
-/* PHY_ANL */
-enum PHY_ANL_BIT {
-       PHY_L_NP = 0x8000, PHY_L_ACK = 0x4000, PHY_L_RF = 0x2000,
-       PHY_L_FCS = 0x0400, PHY_L_T4 = 0x0200, PHY_L_FDX = 0x0100,
-       PHY_L_HDX = 0x0080, PHY_L_10FDX = 0x0040, PHY_L_10HDX = 0x0020,
-       PHY_L_SEL = 0x001f,
-};
-
-/* PHY_ANE */
-enum PHY_ANE_BIT {
-       PHY_E_PDF = 0x0010, PHY_E_LPNPA = 0x0008, PHY_E_NPA = 0x0004,
-       PHY_E_PRX = 0x0002, PHY_E_LPANEGA = 0x0001,
-};
-
-/* DM9161 */
-enum PHY_16_BIT {
-       PHY_16_BP4B45 = 0x8000, PHY_16_BPSCR = 0x4000, PHY_16_BPALIGN = 0x2000,
-       PHY_16_BP_ADPOK = 0x1000, PHY_16_Repeatmode = 0x0800,
-       PHY_16_TXselect = 0x0400,
-       PHY_16_Rsvd = 0x0200, PHY_16_RMIIEnable = 0x0100,
-       PHY_16_Force100LNK = 0x0080,
-       PHY_16_APDLED_CTL = 0x0040, PHY_16_COLLED_CTL = 0x0020,
-       PHY_16_RPDCTR_EN = 0x0010,
-       PHY_16_ResetStMch = 0x0008, PHY_16_PreamSupr = 0x0004,
-       PHY_16_Sleepmode = 0x0002,
-       PHY_16_RemoteLoopOut = 0x0001,
-};
-
-#define POST_RX                0x08
-#define POST_FW                0x04
-#define POST0_RX       (POST_RX)
-#define POST0_FW       (POST_FW)
-#define POST1_RX       (POST_RX >> 2)
-#define POST1_FW       (POST_FW >> 2)
-#define POST_ALL       (POST0_RX | POST0_FW | POST1_RX | POST1_FW)
-
 /* ARSTR */
 enum ARSTR_BIT { ARSTR_ARSTR = 0x00000001, };
 
@@ -757,6 +696,7 @@ struct sh_eth_cpu_data {
        unsigned no_trimd:1;            /* E-DMAC DO NOT have TRIMD */
        unsigned no_ade:1;      /* E-DMAC DO NOT have ADE bit in EESR */
        unsigned hw_crc:1;      /* E-DMAC have CSMR */
+       unsigned select_mii:1;  /* EtherC have RMII_MII (MII select register) */
 };
 
 struct sh_eth_private {
@@ -765,13 +705,14 @@ struct sh_eth_private {
        const u16 *reg_offset;
        void __iomem *addr;
        void __iomem *tsu_addr;
+       u32 num_rx_ring;
+       u32 num_tx_ring;
        dma_addr_t rx_desc_dma;
        dma_addr_t tx_desc_dma;
        struct sh_eth_rxdesc *rx_ring;
        struct sh_eth_txdesc *tx_ring;
        struct sk_buff **rx_skbuff;
        struct sk_buff **tx_skbuff;
-       struct timer_list timer;
        spinlock_t lock;
        u32 cur_rx, dirty_rx;   /* Producer/consumer ring indices */
        u32 cur_tx, dirty_tx;
@@ -786,10 +727,6 @@ struct sh_eth_private {
        int msg_enable;
        int speed;
        int duplex;
-       u32 rx_int_var, tx_int_var;     /* interrupt control variables */
-       char post_rx;           /* POST receive */
-       char post_fw;           /* POST forward */
-       struct net_device_stats tsu_stats;      /* TSU forward status */
        int port;               /* for TSU */
        int vlan_num_ids;       /* for VLAN tag filter */