Revert "phy: merge and backport phy core from linux kernel 4.1"
[firefly-linux-kernel-4.4.55.git] / drivers / phy / phy-rockchip-usb.c
index c1d94dcc0bab92407fb6e97c1e5f8a9c05649b67..2586b767bcb20420830f1d139a2ecb89b727a55f 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * Rockchip usb PHY driver
  *
- * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
+ * Copyright (C) 2014 Roy Li <lyz@rock-chips.com>
  * Copyright (C) 2014 ROCKCHIP, Inc.
  *
  * This program is free software; you can redistribute it and/or modify
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
 
-/*
- * The higher 16-bit of this register is used for write protection
- * only if BIT(13 + 16) set to 1 the BIT(13) can be written.
- */
-#define SIDDQ_WRITE_ENA        BIT(29)
-#define SIDDQ_ON               BIT(13)
+#define ROCKCHIP_RK3288_UOC(n) (0x320 + n * 0x14)
+
+#define SIDDQ_MSK              (1 << (13 + 16))
+#define SIDDQ_ON               (1 << 13)
 #define SIDDQ_OFF              (0 << 13)
 
+enum rk3288_phy_id {
+       RK3288_OTG,
+       RK3288_HOST0,
+       RK3288_HOST1,
+       RK3288_NUM_PHYS,
+};
+
 struct rockchip_usb_phy {
-       unsigned int    reg_offset;
-       struct regmap   *reg_base;
-       struct clk      *clk;
-       struct phy      *phy;
+       struct regmap *reg_base;
+       unsigned int reg_offset;
+       struct clk *clk;
+       struct phy *phy;
 };
 
 static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
                                           bool siddq)
 {
        return regmap_write(phy->reg_base, phy->reg_offset,
-                           SIDDQ_WRITE_ENA | (siddq ? SIDDQ_ON : SIDDQ_OFF));
+                           SIDDQ_MSK | (siddq ? SIDDQ_ON : SIDDQ_OFF));
 }
 
 static int rockchip_usb_phy_power_off(struct phy *_phy)
@@ -55,7 +60,7 @@ static int rockchip_usb_phy_power_off(struct phy *_phy)
        struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
        int ret = 0;
 
-       /* Power down usb phy analog blocks by set siddq 1 */
+       /* Power down usb phy analog blocks by set siddq 1*/
        ret = rockchip_usb_phy_power(phy, 1);
        if (ret)
                return ret;
@@ -76,7 +81,7 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
        if (ret)
                return ret;
 
-       /* Power up usb phy analog blocks by set siddq 0 */
+       /* Power up usb phy analog blocks by set siddq 0*/
        ret = rockchip_usb_phy_power(phy, 0);
        if (ret)
                return ret;
@@ -84,6 +89,17 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
        return 0;
 }
 
+static struct phy *rockchip_usb_phy_xlate(struct device *dev,
+                                       struct of_phandle_args *args)
+{
+       struct rockchip_usb_phy *phy_array = dev_get_drvdata(dev);
+
+       if (WARN_ON(args->args[0] == 0 || args->args[0] >= RK3288_NUM_PHYS))
+               return ERR_PTR(-ENODEV);
+
+       return (phy_array + args->args[0])->phy;
+}
+
 static struct phy_ops ops = {
        .power_on       = rockchip_usb_phy_power_on,
        .power_off      = rockchip_usb_phy_power_off,
@@ -94,10 +110,11 @@ static int rockchip_usb_phy_probe(struct platform_device *pdev)
 {
        struct device *dev = &pdev->dev;
        struct rockchip_usb_phy *rk_phy;
+       struct rockchip_usb_phy *phy_array;
        struct phy_provider *phy_provider;
-       struct device_node *child;
        struct regmap *grf;
-       unsigned int reg_offset;
+       char clk_name[16];
+       int i;
 
        grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
        if (IS_ERR(grf)) {
@@ -105,37 +122,38 @@ static int rockchip_usb_phy_probe(struct platform_device *pdev)
                return PTR_ERR(grf);
        }
 
-       for_each_available_child_of_node(dev->of_node, child) {
-               rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL);
-               if (!rk_phy)
-                       return -ENOMEM;
+       phy_array = devm_kzalloc(dev, RK3288_NUM_PHYS * sizeof(*rk_phy),
+                                GFP_KERNEL);
+       if (!phy_array)
+               return -ENOMEM;
 
-               if (of_property_read_u32(child, "reg", &reg_offset)) {
-                       dev_err(dev, "missing reg property in node %s\n",
-                               child->name);
-                       return -EINVAL;
-               }
+       for (i = 0; i < RK3288_NUM_PHYS; i++) {
+               rk_phy = &phy_array[i];
 
-               rk_phy->reg_offset = reg_offset;
                rk_phy->reg_base = grf;
 
-               rk_phy->clk = of_clk_get_by_name(child, "phyclk");
-               if (IS_ERR(rk_phy->clk))
+               rk_phy->reg_offset = ROCKCHIP_RK3288_UOC(i);
+
+               snprintf(clk_name, sizeof(clk_name), "usbphy%d", i);
+               rk_phy->clk = devm_clk_get(dev, clk_name);
+               if (IS_ERR(rk_phy->clk)) {
+                       dev_warn(dev, "failed to get clock %s\n", clk_name);
                        rk_phy->clk = NULL;
+               }
 
-               rk_phy->phy = devm_phy_create(dev, child, &ops);
+               rk_phy->phy = devm_phy_create(dev, NULL, &ops, NULL);
                if (IS_ERR(rk_phy->phy)) {
-                       dev_err(dev, "failed to create PHY\n");
+                       dev_err(dev, "failed to create PHY %d\n", i);
                        return PTR_ERR(rk_phy->phy);
                }
                phy_set_drvdata(rk_phy->phy, rk_phy);
        }
 
-       phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
-       if (PTR_ERR(phy_provider))
-               return (long)phy_provider;
-       else
-               return 0;
+       platform_set_drvdata(pdev, phy_array);
+
+       phy_provider = devm_of_phy_provider_register(dev,
+                                                    rockchip_usb_phy_xlate);
+       return PTR_ERR_OR_ZERO(phy_provider);
 }
 
 static const struct of_device_id rockchip_usb_phy_dt_ids[] = {
@@ -156,6 +174,6 @@ static struct platform_driver rockchip_usb_driver = {
 
 module_platform_driver(rockchip_usb_driver);
 
-MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>");
+MODULE_AUTHOR("Roy Li <lyz@rock-chips.com>");
 MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver");
 MODULE_LICENSE("GPL v2");