Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next

[firefly-linux-kernel-4.4.55.git] / drivers / spi / spi-mt65xx.c

diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 81b75b94145cbc29d6971c6ffa8166d586fd9472..5f6315c47920efcb42dc52b5c93c26ce60cb7de4 100644 (file)
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -158,7 +158,7 @@ static void mtk_spi_config(struct mtk_spi *mdata,
 #endif
 
        /* set finish and pause interrupt always enable */
-       reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_EN;
+       reg_val |= SPI_CMD_FINISH_IE | SPI_CMD_PAUSE_IE;
 
        /* disable dma mode */
        reg_val &= ~(SPI_CMD_TX_DMA | SPI_CMD_RX_DMA);
@@ -238,8 +238,7 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable)
 static void mtk_spi_prepare_transfer(struct spi_master *master,
                                     struct spi_transfer *xfer)
 {
-       u32 spi_clk_hz, div, high_time, low_time, holdtime,
-           setuptime, cs_idletime, reg_val = 0;
+       u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0;
        struct mtk_spi *mdata = spi_master_get_devdata(master);
 
        spi_clk_hz = clk_get_rate(mdata->spi_clk);
@@ -248,21 +247,18 @@ static void mtk_spi_prepare_transfer(struct spi_master *master,
        else
                div = 1;
 
-       high_time = (div + 1) / 2;
-       low_time = (div + 1) / 2;
-       holdtime = (div + 1) / 2 * 2;
-       setuptime = (div + 1) / 2 * 2;
-       cs_idletime = (div + 1) / 2 * 2;
+       sck_time = (div + 1) / 2;
+       cs_time = sck_time * 2;
 
-       reg_val |= (((high_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
-       reg_val |= (((low_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
-       reg_val |= (((holdtime - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
-       reg_val |= (((setuptime - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
+       reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);
+       reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
+       reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
+       reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);
        writel(reg_val, mdata->base + SPI_CFG0_REG);
 
        reg_val = readl(mdata->base + SPI_CFG1_REG);
        reg_val &= ~SPI_CFG1_CS_IDLE_MASK;
-       reg_val |= (((cs_idletime - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);
+       reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);
        writel(reg_val, mdata->base + SPI_CFG1_REG);
 }
 
@@ -665,8 +661,10 @@ static int mtk_spi_resume(struct device *dev)
 
        if (!pm_runtime_suspended(dev)) {
                ret = clk_prepare_enable(mdata->spi_clk);
-               if (ret < 0)
+               if (ret < 0) {
+                       dev_err(dev, "failed to enable spi_clk (%d)\n", ret);
                        return ret;
+               }
        }
 
        ret = spi_master_resume(master);
@@ -692,8 +690,15 @@ static int mtk_spi_runtime_resume(struct device *dev)
 {
        struct spi_master *master = dev_get_drvdata(dev);
        struct mtk_spi *mdata = spi_master_get_devdata(master);
+       int ret;
+
+       ret = clk_prepare_enable(mdata->spi_clk);
+       if (ret < 0) {
+               dev_err(dev, "failed to enable spi_clk (%d)\n", ret);
+               return ret;
+       }
 
-       return clk_prepare_enable(mdata->spi_clk);
+       return 0;
 }
 #endif /* CONFIG_PM */