arm64: dts: rockchip: enable dmc and set A53 1.5G voltage to 1.1V on rk3399 mid

[firefly-linux-kernel-4.4.55.git] / drivers / staging / comedi / drivers / addi_apci_2032.c

diff --git a/drivers/staging/comedi/drivers/addi_apci_2032.c b/drivers/staging/comedi/drivers/addi_apci_2032.c
index ad715253bdccdfdbeb04993c5ad9ee264ce5f615..50f9eb25d7cbd55d6dee07b73392c5ca7ba8ebd9 100644 (file)
--- a/drivers/staging/comedi/drivers/addi_apci_2032.c
+++ b/drivers/staging/comedi/drivers/addi_apci_2032.c
@@ -34,19 +34,19 @@
  */
 #define APCI2032_DO_REG                        0x00
 #define APCI2032_INT_CTRL_REG          0x04
-#define APCI2032_INT_CTRL_VCC_ENA      (1 << 0)
-#define APCI2032_INT_CTRL_CC_ENA       (1 << 1)
+#define APCI2032_INT_CTRL_VCC_ENA      BIT(0)
+#define APCI2032_INT_CTRL_CC_ENA       BIT(1)
 #define APCI2032_INT_STATUS_REG                0x08
-#define APCI2032_INT_STATUS_VCC                (1 << 0)
-#define APCI2032_INT_STATUS_CC         (1 << 1)
+#define APCI2032_INT_STATUS_VCC                BIT(0)
+#define APCI2032_INT_STATUS_CC         BIT(1)
 #define APCI2032_STATUS_REG            0x0c
-#define APCI2032_STATUS_IRQ            (1 << 0)
+#define APCI2032_STATUS_IRQ            BIT(0)
 #define APCI2032_WDOG_REG              0x10
 
 struct apci2032_int_private {
-       spinlock_t spinlock;
-       bool active;
-       unsigned char enabled_isns;
+       spinlock_t spinlock;            /* protects the following members */
+       bool active;                    /* an async command is running */
+       unsigned char enabled_isns;     /* mask of enabled interrupt channels */
 };
 
 static int apci2032_do_insn_bits(struct comedi_device *dev,