/* struct drm_i915_master_private *master_priv; */
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
- struct psb_intel_mode_device *mode_dev = psb_intel_crtc->mode_dev;
int pipe = psb_intel_crtc->pipe;
- unsigned long Start, Offset;
+ unsigned long start, offset;
int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);
int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
return 0;
}
- if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_FORCE_POWER_ON))
+ if (!gma_power_begin(dev, true))
return 0;
- Start = mode_dev->bo_offset(dev, psbfb);
- Offset = y * crtc->fb->pitch + x * (crtc->fb->bits_per_pixel / 8);
+ /* We are displaying this buffer, make sure it is actually loaded
+ into the GTT */
+ ret = psb_gtt_pin(psbfb->gtt);
+ if (ret < 0)
+ goto psb_intel_pipe_set_base_exit;
+ start = psbfb->gtt->offset;
+
+ offset = y * crtc->fb->pitch + x * (crtc->fb->bits_per_pixel / 8);
REG_WRITE(dspstride, crtc->fb->pitch);
default:
DRM_ERROR("Unknown color depth\n");
ret = -EINVAL;
+ psb_gtt_unpin(psbfb->gtt);
goto psb_intel_pipe_set_base_exit;
}
REG_WRITE(dspcntr_reg, dspcntr);
- DRM_DEBUG("Writing base %08lX %08lX %d %d\n", Start, Offset, x, y);
+
+ DRM_DEBUG("Writing base %08lX %08lX %d %d\n", start, offset, x, y);
if (0 /* FIXMEAC - check what PSB needs */) {
- REG_WRITE(dspbase, Offset);
+ REG_WRITE(dspbase, offset);
REG_READ(dspbase);
- REG_WRITE(dspsurf, Start);
+ REG_WRITE(dspsurf, start);
REG_READ(dspsurf);
} else {
- REG_WRITE(dspbase, Start + Offset);
+ REG_WRITE(dspbase, start + offset);
REG_READ(dspbase);
}
-psb_intel_pipe_set_base_exit:
-
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ /* If there was a previous display we can now unpin it */
+ if (old_fb)
+ psb_gtt_unpin(to_psb_fb(old_fb)->gtt);
+psb_intel_pipe_set_base_exit:
+ gma_power_end(dev);
return ret;
}
return;
}
- if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_ONLY_IF_ON)) {
+ if (gma_power_begin(dev, false)) {
for (i = 0; i < 256; i++) {
REG_WRITE(palreg + 4 * i,
((psb_intel_crtc->lut_r[i] +
(psb_intel_crtc->lut_b[i] +
psb_intel_crtc->lut_adj[i]));
}
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ gma_power_end(dev);
} else {
for (i = 0; i < 256; i++) {
dev_priv->save_palette_a[i] =
uint32_t width, uint32_t height)
{
struct drm_device *dev = crtc->dev;
- struct drm_psb_private *dev_priv =
- (struct drm_psb_private *)dev->dev_private;
- struct psb_gtt *pg = dev_priv->pg;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
- struct psb_intel_mode_device *mode_dev = psb_intel_crtc->mode_dev;
int pipe = psb_intel_crtc->pipe;
uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
uint32_t temp;
size_t addr = 0;
- uint32_t page_offset;
- size_t size;
- void *bo;
+ struct gtt_range *gt;
+ struct drm_gem_object *obj;
int ret;
DRM_DEBUG("\n");
if (!handle) {
DRM_DEBUG("cursor off\n");
/* turn off the cursor */
- temp = 0;
- temp |= CURSOR_MODE_DISABLE;
+ temp = CURSOR_MODE_DISABLE;
- if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_ONLY_IF_ON)) {
+ if (gma_power_begin(dev, false)) {
REG_WRITE(control, temp);
REG_WRITE(base, 0);
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ gma_power_end(dev);
}
- /* unpin the old bo */
- if (psb_intel_crtc->cursor_bo) {
- mode_dev->bo_unpin_for_scanout(dev,
- psb_intel_crtc->
- cursor_bo);
- psb_intel_crtc->cursor_bo = NULL;
+ /* Unpin the old GEM object */
+ if (psb_intel_crtc->cursor_obj) {
+ gt = container_of(psb_intel_crtc->cursor_obj,
+ struct gtt_range, gem);
+ psb_gtt_unpin(gt);
+ drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
+ psb_intel_crtc->cursor_obj = NULL;
}
return 0;
return -EINVAL;
}
- bo = mode_dev->bo_from_handle(dev, file_priv, handle);
- if (!bo)
+ obj = drm_gem_object_lookup(dev, file_priv, handle);
+ if (!obj)
return -ENOENT;
- ret = mode_dev->bo_pin_for_scanout(dev, bo);
- if (ret)
- return ret;
- size = mode_dev->bo_size(dev, bo);
- if (size < width * height * 4) {
+ if (obj->size < width * height * 4) {
DRM_ERROR("buffer is to small\n");
return -ENOMEM;
}
- /*insert this bo into gtt*/
- DRM_DEBUG("%s: map meminfo for hw cursor. handle %x\n",
- __func__, handle);
+ gt = container_of(obj, struct gtt_range, gem);
- ret = psb_gtt_map_meminfo(dev, (void *)handle, &page_offset);
+ /* Pin the memory into the GTT */
+ ret = psb_gtt_pin(gt);
if (ret) {
- DRM_ERROR("Can not map meminfo to GTT. handle 0x%x\n", handle);
+ DRM_ERROR("Can not pin down handle 0x%x\n", handle);
return ret;
}
- addr = page_offset << PAGE_SHIFT;
- addr += pg->stolen_base;
+ addr = gt->offset; /* Or resource.start ??? */
psb_intel_crtc->cursor_addr = addr;
temp |= (pipe << 28);
temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
- if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_ONLY_IF_ON)) {
+ if (gma_power_begin(dev, false)) {
REG_WRITE(control, temp);
REG_WRITE(base, addr);
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ gma_power_end(dev);
}
/* unpin the old bo */
- if (psb_intel_crtc->cursor_bo && psb_intel_crtc->cursor_bo != bo) {
- mode_dev->bo_unpin_for_scanout(dev, psb_intel_crtc->cursor_bo);
- psb_intel_crtc->cursor_bo = bo;
+ if (psb_intel_crtc->cursor_obj && psb_intel_crtc->cursor_obj != obj) {
+ gt = container_of(psb_intel_crtc->cursor_obj,
+ struct gtt_range, gem);
+ psb_gtt_unpin(gt);
+ drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
+ psb_intel_crtc->cursor_obj = obj;
}
return 0;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
uint32_t temp = 0;
- uint32_t adder;
+ uint32_t addr;
if (x < 0) {
temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT);
temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
- adder = psb_intel_crtc->cursor_addr;
+ addr = psb_intel_crtc->cursor_addr;
- if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_ONLY_IF_ON)) {
+ if (gma_power_begin(dev, false)) {
REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
- REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, adder);
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, addr);
+ gma_power_end(dev);
}
return 0;
}
bool is_lvds;
struct drm_psb_private *dev_priv = dev->dev_private;
- if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_ONLY_IF_ON)) {
+ if (gma_power_begin(dev, false)) {
dpll = REG_READ((pipe == 0) ? DPLL_A : DPLL_B);
if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
fp = REG_READ((pipe == 0) ? FPA0 : FPB0);
else
fp = REG_READ((pipe == 0) ? FPA1 : FPB1);
is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ gma_power_end(dev);
} else {
dpll = (pipe == 0) ?
dev_priv->saveDPLL_A : dev_priv->saveDPLL_B;
int vsync;
struct drm_psb_private *dev_priv = dev->dev_private;
- if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
- OSPM_UHB_ONLY_IF_ON)) {
+ if (gma_power_begin(dev, false)) {
htot = REG_READ((pipe == 0) ? HTOTAL_A : HTOTAL_B);
hsync = REG_READ((pipe == 0) ? HSYNC_A : HSYNC_B);
vtot = REG_READ((pipe == 0) ? VTOTAL_A : VTOTAL_B);
vsync = REG_READ((pipe == 0) ? VSYNC_A : VSYNC_B);
- ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
+ gma_power_end(dev);
} else {
htot = (pipe == 0) ?
dev_priv->saveHTOTAL_A : dev_priv->saveHTOTAL_B;
static void psb_intel_crtc_destroy(struct drm_crtc *crtc)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-
+ struct gtt_range *gt;
+
+ /* Unpin the old GEM object */
+ if (psb_intel_crtc->cursor_obj) {
+ gt = container_of(psb_intel_crtc->cursor_obj,
+ struct gtt_range, gem);
+ psb_gtt_unpin(gt);
+ drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
+ psb_intel_crtc->cursor_obj = NULL;
+ }
kfree(psb_intel_crtc->crtc_state);
drm_crtc_cleanup(crtc);
kfree(psb_intel_crtc);
.commit = psb_intel_crtc_commit,
};
-static const struct drm_crtc_helper_funcs mrst_helper_funcs;
-static const struct drm_crtc_helper_funcs mdfld_helper_funcs;
-const struct drm_crtc_funcs mdfld_intel_crtc_funcs;
-
const struct drm_crtc_funcs psb_intel_crtc_funcs = {
.save = psb_intel_crtc_save,
.restore = psb_intel_crtc_restore,
psb_intel_crtc->mode_dev = mode_dev;
psb_intel_crtc->cursor_addr = 0;
- drm_crtc_helper_add(&psb_intel_crtc->base,
+ if (IS_MRST(dev))
+ drm_crtc_helper_add(&psb_intel_crtc->base,
+ &mrst_helper_funcs);
+ else
+ drm_crtc_helper_add(&psb_intel_crtc->base,
&psb_intel_helper_funcs);
/* Setup the array of drm_connector pointer array */
projects / firefly-linux-kernel-4.4.55.git / blobdiff