thermal: exynos: simplify HW_TRIP level setting

[firefly-linux-kernel-4.4.55.git] / drivers / thermal / samsung / exynos_tmu_data.c

diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 2683d2897e90bc6de18a5a367aa83342f401b00f..f81c940fe88473191bd8bd5d73cf17bf44dd9bf2 100644 (file)
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -26,11 +26,8 @@
 
 #if defined(CONFIG_CPU_EXYNOS4210)
 static const struct exynos_tmu_registers exynos4210_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
-       .tmu_status = EXYNOS_TMU_REG_STATUS,
        .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
-       .threshold_temp = EXYNOS4210_TMU_REG_THRESHOLD_TEMP,
        .threshold_th0 = EXYNOS4210_TMU_REG_TRIG_LEVEL0,
        .tmu_inten = EXYNOS_TMU_REG_INTEN,
        .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
@@ -85,16 +82,7 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS3250)
 static const struct exynos_tmu_registers exynos3250_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
-       .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
-       .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
-       .triminfo_ctrl_count = 2,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
-       .test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
-       .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
-       .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
-       .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
-       .tmu_status = EXYNOS_TMU_REG_STATUS,
        .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
        .threshold_th0 = EXYNOS_THD_TEMP_RISE,
        .threshold_th1 = EXYNOS_THD_TEMP_FALL,
@@ -106,8 +94,6 @@ static const struct exynos_tmu_registers exynos3250_tmu_registers = {
        .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
        .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
        .emul_con = EXYNOS_EMUL_CON,
-       .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
-       .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
 };
 
 #define EXYNOS3250_TMU_DATA \
@@ -145,8 +131,6 @@ static const struct exynos_tmu_registers exynos3250_tmu_registers = {
                .temp_level = 95, \
        }, \
        .freq_tab_count = 2, \
-       .triminfo_reload[0] = EXYNOS_TRIMINFO_RELOAD_ENABLE, \
-       .triminfo_reload[1] = EXYNOS_TRIMINFO_RELOAD_ENABLE, \
        .registers = &exynos3250_tmu_registers, \
        .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
                        TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
@@ -168,15 +152,7 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
 static const struct exynos_tmu_registers exynos4412_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
-       .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
-       .triminfo_ctrl_count = 1,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
-       .test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
-       .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
-       .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
-       .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
-       .tmu_status = EXYNOS_TMU_REG_STATUS,
        .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
        .threshold_th0 = EXYNOS_THD_TEMP_RISE,
        .threshold_th1 = EXYNOS_THD_TEMP_FALL,
@@ -189,8 +165,6 @@ static const struct exynos_tmu_registers exynos4412_tmu_registers = {
        .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
        .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
        .emul_con = EXYNOS_EMUL_CON,
-       .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
-       .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
 };
 
 #define EXYNOS4412_TMU_DATA \
@@ -228,7 +202,6 @@ static const struct exynos_tmu_registers exynos4412_tmu_registers = {
                .temp_level = 95, \
        }, \
        .freq_tab_count = 2, \
-       .triminfo_reload[0] = EXYNOS_TRIMINFO_RELOAD_ENABLE, \
        .registers = &exynos4412_tmu_registers, \
        .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
                        TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
@@ -262,13 +235,7 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS5260)
 static const struct exynos_tmu_registers exynos5260_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
-       .tmu_ctrl = EXYNOS_TMU_REG_CONTROL1,
-       .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
-       .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
-       .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
-       .tmu_status = EXYNOS_TMU_REG_STATUS,
        .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
        .threshold_th0 = EXYNOS_THD_TEMP_RISE,
        .threshold_th1 = EXYNOS_THD_TEMP_FALL,
@@ -281,8 +248,6 @@ static const struct exynos_tmu_registers exynos5260_tmu_registers = {
        .tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT,
        .tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR,
        .emul_con = EXYNOS5260_EMUL_CON,
-       .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
-       .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
 };
 
 #define __EXYNOS5260_TMU_DATA  \
@@ -342,12 +307,7 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS5420)
 static const struct exynos_tmu_registers exynos5420_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
-       .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
-       .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
-       .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
-       .tmu_status = EXYNOS_TMU_REG_STATUS,
        .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
        .threshold_th0 = EXYNOS_THD_TEMP_RISE,
        .threshold_th1 = EXYNOS_THD_TEMP_FALL,
@@ -361,8 +321,6 @@ static const struct exynos_tmu_registers exynos5420_tmu_registers = {
        .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
        .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
        .emul_con = EXYNOS_EMUL_CON,
-       .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
-       .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
 };
 
 #define __EXYNOS5420_TMU_DATA  \
@@ -429,17 +387,10 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS5440)
 static const struct exynos_tmu_registers exynos5440_tmu_registers = {
-       .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
        .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
-       .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
-       .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
-       .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
-       .tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
        .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
        .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
        .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1,
-       .threshold_th2 = EXYNOS5440_TMU_S0_7_TH2,
-       .threshold_th3_l0_shift = EXYNOS5440_TMU_TH_RISE4_SHIFT,
        .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN,
        .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT,
        .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT,
@@ -448,10 +399,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
        .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
        .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
        .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
-       .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
        .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
-       .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
-       .tmu_pmin = EXYNOS5440_TMU_PMIN,
 };
 
 #define EXYNOS5440_TMU_DATA \