v_HASP(screen->mode.hsync_len + left_margin);
lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
- if (screen->mode.vmode == FB_VMODE_INTERLACED) {
+ if (screen->mode.vmode & FB_VMODE_INTERLACED) {
/*First Field Timing*/
lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END,
v_VSYNC(screen->mode.vsync_len) |
if ((open) && (!lcdc_dev->atv_layer_cnt)) {
rk3036_lcdc_pre_init(dev_drv);
rk3036_lcdc_clk_enable(lcdc_dev);
- #if defined(CONFIG_ROCKCHIP_IOMMU)
if (dev_drv->iommu_enabled) {
if (!dev_drv->mmu_dev) {
dev_drv->mmu_dev =
}
}
}
- #endif
rk3036_lcdc_reg_restore(lcdc_dev);
/*if (dev_drv->iommu_enabled)
rk3036_lcdc_mmu_en(dev_drv);*/
if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
rk3036_lcdc_disable_irq(lcdc_dev);
rk3036_lcdc_reg_update(dev_drv);
- #if defined(CONFIG_ROCKCHIP_IOMMU)
if (dev_drv->iommu_enabled) {
if (dev_drv->mmu_dev)
rockchip_iovmm_deactivate(dev_drv->dev);
}
- #endif
rk3036_lcdc_clk_disable(lcdc_dev);
}
*/
win->area[0].dsp_stx = win->post_cfg.xpos + screen->mode.left_margin +
screen->mode.hsync_len;
- if (screen->mode.vmode == FB_VMODE_INTERLACED) {
+ if (screen->mode.vmode & FB_VMODE_INTERLACED) {
win->post_cfg.ysize /= 2;
win->area[0].dsp_sty = win->post_cfg.ypos/2 +
screen->mode.upper_margin +
}
static int rk3036_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv,
- int win_id)
+ int win_id,
+ int area_id)
{
return dev_drv->win[win_id]->state;
}
spin_lock(&lcdc_dev->reg_lock);
if (lcdc_dev->clk_on) {
- #if defined(CONFIG_ROCKCHIP_IOMMU)
if (dev_drv->iommu_enabled) {
if (!lcdc_dev->iommu_status && dev_drv->mmu_dev) {
lcdc_dev->iommu_status = 1;
rk3036_lcdc_mmu_en(dev_drv);
}
}
- #endif
lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
v_LCDC_STANDBY(lcdc_dev->standby));
for (i = 0; i < ARRAY_SIZE(lcdc_win); i++) {
}
static int rk3036_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,
- unsigned int *dsp_addr)
+ unsigned int dsp_addr[][4])
{
struct lcdc_device *lcdc_dev =
container_of(dev_drv, struct lcdc_device, driver);
if (lcdc_dev->clk_on) {
- dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
- dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
+ dsp_addr[0][0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
+ dsp_addr[1][0] = lcdc_readl(lcdc_dev, WIN1_MST);
}
return 0;
}
struct device_node *np = lcdc_dev->dev->of_node;
int val;
-#if defined(CONFIG_ROCKCHIP_IOMMU)
if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
lcdc_dev->driver.iommu_enabled = 0;
else
lcdc_dev->driver.iommu_enabled = val;
-#else
- lcdc_dev->driver.iommu_enabled = 0;
-#endif
if (of_property_read_u32(np, "rockchip,fb-win-map", &val))
lcdc_dev->driver.fb_win_map = FB_DEFAULT_ORDER;
else