video: rockchip: vop: 3288: add parse dsp mode for VR

[firefly-linux-kernel-4.4.55.git] / drivers / video / rockchip / lcdc / rk3288_lcdc.c

diff --git a/drivers/video/rockchip/lcdc/rk3288_lcdc.c b/drivers/video/rockchip/lcdc/rk3288_lcdc.c
index 63c019339bd2daffb099c3823213acc7b4e2574f..1f300c4d2bfff92d9656c554c069e3cf56cb73d8 100755 (executable)
--- a/drivers/video/rockchip/lcdc/rk3288_lcdc.c
+++ b/drivers/video/rockchip/lcdc/rk3288_lcdc.c
@@ -1085,7 +1085,6 @@ static int rk3288_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
                pr_info("%s,clk_on = %d\n", __func__, lcdc_dev->clk_on);
                return 0;
        }
-#if defined(CONFIG_ROCKCHIP_IOMMU)
        if (dev_drv->iommu_enabled) {
                if (!lcdc_dev->iommu_status && dev_drv->mmu_dev) {
 
@@ -1103,7 +1102,6 @@ static int rk3288_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
                        rockchip_iovmm_activate(dev_drv->dev);
                }
        }
-#endif
        return 0;
 }
 
@@ -1158,7 +1156,8 @@ static void rk3288_lcdc_bcsh_path_sel(struct rk_lcdc_driver *dev_drv)
 }
 
 static int rk3288_get_dspbuf_info(struct rk_lcdc_driver *dev_drv, u16 *xact,
-                                 u16 *yact, int *format, u32 *dsp_addr)
+                                 u16 *yact, int *format, u32 *dsp_addr,
+                                 int *ymirror)
 {
        struct lcdc_device *lcdc_dev = container_of(dev_drv,
                                                    struct lcdc_device, driver);
@@ -1180,11 +1179,13 @@ static int rk3288_get_dspbuf_info(struct rk_lcdc_driver *dev_drv, u16 *xact,
 }
 
 static int rk3288_post_dspbuf(struct rk_lcdc_driver *dev_drv, u32 rgb_mst,
-                             int format, u16 xact, u16 yact, u16 xvir)
+                             int format, u16 xact, u16 yact, u16 xvir,
+                             int ymirror)
 {
        struct lcdc_device *lcdc_dev = container_of(dev_drv,
                                                    struct lcdc_device, driver);
        u32 val, mask;
+       struct rk_lcdc_win *win = dev_drv->win[0];
        int swap = (format == RGB888) ? 1 : 0;
 
        mask = m_WIN0_DATA_FMT | m_WIN0_RB_SWAP;
@@ -1199,6 +1200,8 @@ static int rk3288_post_dspbuf(struct rk_lcdc_driver *dev_drv, u32 rgb_mst,
        lcdc_writel(lcdc_dev, WIN0_YRGB_MST, rgb_mst);
 
        lcdc_cfg_done(lcdc_dev);
+       win->state = 1;
+       win->last_state = 1;
 
        return 0;
 }
@@ -1351,6 +1354,11 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
                        mask = m_EDP_OUT_EN;
                        val = v_EDP_OUT_EN(1);
                        break;
+               default:
+                       mask = 0;
+                       val = 0;
+                       pr_info("unknow screen type: %d\n", screen->type);
+                       break;
                }
                if (dev_drv->version == VOP_FULL_RK3288_V1_1) {
                        mask |= m_HDMI_DCLK_OUT_EN;
@@ -1567,7 +1575,6 @@ static int rk3288_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
                rk3288_lcdc_pre_init(dev_drv);
                rk3288_lcdc_clk_enable(lcdc_dev);
                rk3288_lcdc_enable_irq(dev_drv);
-#if defined(CONFIG_ROCKCHIP_IOMMU)
                if (dev_drv->iommu_enabled) {
                        if (!dev_drv->mmu_dev) {
                                dev_drv->mmu_dev =
@@ -1582,7 +1589,6 @@ static int rk3288_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
                                }
                        }
                }
-#endif
                rk3288_lcdc_reg_restore(lcdc_dev);
                /*if (dev_drv->iommu_enabled)
                   rk3368_lcdc_mmu_en(dev_drv); */
@@ -1614,14 +1620,12 @@ static int rk3288_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
        if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
                rk3288_lcdc_disable_irq(lcdc_dev);
                rk3288_lcdc_reg_update(dev_drv);
-#if defined(CONFIG_ROCKCHIP_IOMMU)
                if (dev_drv->iommu_enabled) {
                        if (dev_drv->mmu_dev) {
                                rockchip_iovmm_deactivate(dev_drv->dev);
                                lcdc_dev->iommu_status = 0;
                        }
                }
-#endif
                rk3288_lcdc_clk_disable(lcdc_dev);
                rockchip_clear_system_status(sys_status);
        }
@@ -3958,9 +3962,6 @@ static irqreturn_t rk3288_lcdc_isr(int irq, void *dev_id)
                        complete(&(lcdc_dev->driver.frame_done));
                        spin_unlock(&(lcdc_dev->driver.cpl_lock));
                }
-#ifdef CONFIG_DRM_ROCKCHIP
-               lcdc_dev->driver.irq_call_back(&lcdc_dev->driver);
-#endif 
                lcdc_dev->driver.vsync_info.timestamp = timestamp;
                wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
 
@@ -4060,14 +4061,16 @@ static int rk3288_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
                dev_drv->bcsh.cos_hue = (val >> 8) & 0xff;
        }
 
-#if defined(CONFIG_ROCKCHIP_IOMMU)
        if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
                dev_drv->iommu_enabled = 0;
        else
                dev_drv->iommu_enabled = val;
-#else
-       dev_drv->iommu_enabled = 0;
-#endif
+
+       if (of_property_read_u32(np, "rockchip,dsp_mode", &val))
+               dev_drv->dsp_mode = DEFAULT_MODE;
+       else
+               dev_drv->dsp_mode = val;
+
        return 0;
 }