struct list_head status_link; /* link to register set list */\r
uint32_t sys_reg[RGA_REG_CTRL_LEN];\r
uint32_t cmd_reg[RGA_REG_CMD_LEN];\r
+ \r
uint32_t *MMU_base;\r
- //atomic_t int_enable;\r
- \r
- //struct rga_req req;\r
+ //atomic_t int_enable; \r
+\r
+ //struct rga_req req;\r
};\r
\r
\r
atomic_t total_running;\r
\r
struct rga_reg *reg;\r
+ \r
uint32_t cmd_buff[28*8];/* cmd_buff for rga */\r
uint32_t *pre_scale_buf;\r
atomic_t int_disable; /* 0 int enable 1 int disable */\r
atomic_t rga_working;\r
bool enable;\r
\r
+ //struct rga_req req[10];\r
+\r
struct mutex mutex; // mutex\r
} rga_service_info;\r
\r
\r
\r
-#if defined(CONFIG_ARCH_RK2928)\r
+#if defined(CONFIG_ARCH_RK2928) || defined(CONFIG_ARCH_RK3026)\r
#define RGA_BASE 0x1010c000\r
#elif defined(CONFIG_ARCH_RK30)\r
#define RGA_BASE 0x10114000\r
-#elif defined(CONFIG_ARCH_RK31)\r
-#define RGA_BASE 0x10114000\r
#endif\r
\r
//General Registers\r
\r
#define RGA_BLIT_COMPLETE_EVENT 1\r
\r
-\r
+long rga_ioctl_kernel(struct rga_req *req);\r
\r
\r
#endif /*_RK29_IPP_DRIVER_H_*/\r