#include <asm/io.h>\r
#include <linux/irq.h>\r
#include <linux/interrupt.h>\r
-#include <mach/io.h>\r
-#include <mach/irqs.h>\r
+//#include <mach/io.h>\r
+//#include <mach/irqs.h>\r
#include <linux/fs.h>\r
#include <asm/uaccess.h>\r
#include <linux/miscdevice.h>\r
#include "rga.h"\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_pixel_width_init \r
-Description: \r
- select pixel_width form data format \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_pixel_width_init\r
+Description:\r
+ select pixel_width form data format\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
unsigned char\r
RGA_pixel_width_init(unsigned int format)\r
case RK_FORMAT_RGBA_4444 : pixel_width = 2; break;\r
case RK_FORMAT_BGR_888 : pixel_width = 3; break;\r
\r
- /* YUV FORMAT */ \r
+ /* YUV FORMAT */\r
case RK_FORMAT_YCbCr_422_SP : pixel_width = 1; break;\r
case RK_FORMAT_YCbCr_422_P : pixel_width = 1; break;\r
case RK_FORMAT_YCbCr_420_SP : pixel_width = 1; break;\r
return pixel_width;\r
}\r
\r
-/************************************************************* \r
-Func: \r
- dst_ctrl_cal \r
-Description: \r
- calculate dst act window position / width / height \r
- and set the tile struct \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ dst_ctrl_cal\r
+Description:\r
+ calculate dst act window position / width / height\r
+ and set the tile struct\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
void\r
dst_ctrl_cal(const struct rga_req *msg, TILE_INFO *tile)\r
{\r
pos[0] = xoff;\r
pos[1] = yoff;\r
- \r
+\r
pos[2] = xoff;\r
pos[3] = yoff + height - 1;\r
- \r
+\r
pos[4] = xoff + width - 1;\r
pos[5] = yoff + height - 1;\r
\r
\r
xmax = MIN(MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmax);\r
xmin = MAX(MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmin);\r
- \r
+\r
ymax = MIN(MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymax);\r
ymin = MAX(MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymin);\r
- \r
+\r
//printk("xmax = %d, xmin = %d, ymin = %d, ymax = %d\n", xmax, xmin, ymin, ymax);\r
}\r
else if(msg->rotate_mode == 1)\r
{\r
if((sina == 0) || (cosa == 0))\r
- { \r
+ {\r
if((sina == 0) && (cosa == -65536))\r
{\r
/* 180 */\r
pos[5] = yoff;\r
\r
pos[6] = xoff + height - 1;\r
- pos[7] = yoff - width + 1; \r
+ pos[7] = yoff - width + 1;\r
}\r
else\r
{\r
\r
xmax = MIN(MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmax);\r
xmin = MAX(MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]), msg->clip.xmin);\r
- \r
+\r
ymax = MIN(MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymax);\r
ymin = MAX(MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]), msg->clip.ymin);\r
- } \r
+ }\r
else\r
{\r
xx = msg->cosa;\r
\r
x2 = width + xoff;\r
y2 = height + yoff;\r
- \r
+\r
pos[0] = xoff;\r
pos[1] = yoff;\r
\r
\r
//printk("xmin = %d, xmax = %d, ymin = %d, ymax = %d\n", xmin, xmax, ymin, ymax);\r
}\r
- } \r
- \r
- if ((xmax < xmin) || (ymax < ymin)) { \r
+ }\r
+\r
+ if ((xmax < xmin) || (ymax < ymin)) {\r
xmin = xmax;\r
ymin = ymax;\r
- } \r
- \r
- if ((xmin >= msg->dst.vir_w)||(xmax < 0)||(ymin >= msg->dst.vir_h)||(ymax < 0)) { \r
+ }\r
+\r
+ if ((xmin >= msg->dst.vir_w)||(xmax < 0)||(ymin >= msg->dst.vir_h)||(ymax < 0)) {\r
xmin = xmax = ymin = ymax = 0;\r
}\r
\r
//printk("xmin = %d, xmax = %d, ymin = %d, ymax = %d\n", xmin, xmax, ymin, ymax);\r
- \r
+\r
tile->dst_ctrl.w = (xmax - xmin);\r
tile->dst_ctrl.h = (ymax - ymin);\r
tile->dst_ctrl.x_off = xmin;\r
tile->dst_y_tmp = ymin - msg->dst.y_offset;\r
}\r
\r
-/************************************************************* \r
-Func: \r
- src_tile_info_cal \r
-Description: \r
- calculate src remap window position / width / height \r
- and set the tile struct \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ src_tile_info_cal\r
+Description:\r
+ calculate src remap window position / width / height\r
+ and set the tile struct\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
void\r
src_tile_info_cal(const struct rga_req *msg, TILE_INFO *tile)\r
{\r
- s32 x0, x1, x2, x3, y0, y1, y2, y3; \r
- \r
+ s32 x0, x1, x2, x3, y0, y1, y2, y3;\r
+\r
int64_t xx, xy, yx, yy;\r
\r
int64_t pos[8];\r
yy = tile->matrix[3]; /* 32.32 */\r
\r
if(msg->rotate_mode == 1)\r
- { \r
+ {\r
x0 = tile->dst_x_tmp;\r
y0 = tile->dst_y_tmp;\r
- \r
+\r
x1 = x0;\r
y1 = y0 + 8;\r
\r
\r
x3 = x0 + 8;\r
y3 = y0;\r
- \r
- pos[0] = (x0*xx + y0*yx); \r
+\r
+ pos[0] = (x0*xx + y0*yx);\r
pos[1] = (x0*xy + y0*yy);\r
\r
pos[2] = (x1*xx + y1*yx);\r
y_dx = pos[2] - pos[0];\r
y_dy = pos[3] - pos[1];\r
\r
- tile->x_dx = (s32)(x_dx >> 22 ); \r
- tile->x_dy = (s32)(x_dy >> 22 ); \r
- tile->y_dx = (s32)(y_dx >> 22 ); \r
- tile->y_dy = (s32)(y_dy >> 22 ); \r
- \r
+ tile->x_dx = (s32)(x_dx >> 22 );\r
+ tile->x_dy = (s32)(x_dy >> 22 );\r
+ tile->y_dx = (s32)(y_dx >> 22 );\r
+ tile->y_dy = (s32)(y_dy >> 22 );\r
+\r
x_temp_start = x0*xx + y0*yx;\r
y_temp_start = x0*xy + y0*yy;\r
- \r
- xmax = (MAX(MAX(MAX(epos[0], epos[2]), epos[4]), epos[6])); \r
- xmin = (MIN(MIN(MIN(epos[0], epos[2]), epos[4]), epos[6])); \r
+\r
+ xmax = (MAX(MAX(MAX(epos[0], epos[2]), epos[4]), epos[6]));\r
+ xmin = (MIN(MIN(MIN(epos[0], epos[2]), epos[4]), epos[6]));\r
\r
ymax = (MAX(MAX(MAX(epos[1], epos[3]), epos[5]), epos[7]));\r
ymin = (MIN(MIN(MIN(epos[1], epos[3]), epos[5]), epos[7]));\r
\r
t_xoff = (x_temp_start - xmin)>>18;\r
t_yoff = (y_temp_start - ymin)>>18;\r
- \r
+\r
tile->tile_xoff = (s32)t_xoff;\r
tile->tile_yoff = (s32)t_yoff;\r
- \r
+\r
tile->tile_w = (u16)((xmax - xmin)>>21); //.11\r
tile->tile_h = (u16)((ymax - ymin)>>21); //.11\r
\r
tile->tile_start_x_coor = (s16)(xmin>>29); //.3\r
- tile->tile_start_y_coor = (s16)(ymin>>29); //.3 \r
+ tile->tile_start_y_coor = (s16)(ymin>>29); //.3\r
}\r
else if (msg->rotate_mode == 2)\r
{\r
tile->x_dy = 0;\r
tile->y_dx = 0;\r
tile->y_dy = (s32)((8*yy)>>22);\r
- \r
+\r
tile->tile_w = ABS((s32)((7*xx)>>21));\r
tile->tile_h = ABS((s32)((7*yy)>>21));\r
\r
tile->tile_yoff = 0;\r
\r
tile->tile_start_x_coor = (((msg->src.act_w - 1)<<11) - (tile->tile_w))>>8;\r
- tile->tile_start_y_coor = 0; \r
+ tile->tile_start_y_coor = 0;\r
}\r
else if (msg->rotate_mode == 3)\r
{\r
tile->x_dy = 0;\r
tile->y_dx = 0;\r
tile->y_dy = (s32)((8*yy)>>22);\r
- \r
+\r
tile->tile_w = ABS((s32)((7*xx)>>21));\r
tile->tile_h = ABS((s32)((7*yy)>>21));\r
\r
\r
tile->tile_start_x_coor = 0;\r
tile->tile_start_y_coor = (((msg->src.act_h - 1)<<11) - (tile->tile_h))>>8;\r
- } \r
+ }\r
\r
if ((msg->scale_mode == 2)||(msg->alpha_rop_flag >> 7))\r
{\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_mode_ctrl \r
-Description: \r
- fill mode ctrl reg info \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_set_mode_ctrl\r
+Description:\r
+ fill mode ctrl reg info\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
-void \r
+void\r
RGA_set_mode_ctrl(u8 *base, const struct rga_req *msg)\r
{\r
u32 *bRGA_MODE_CTL;\r
u32 reg = 0;\r
- \r
+\r
u8 src_rgb_pack = 0;\r
u8 src_format = 0;\r
u8 src_rb_swp = 0;\r
u8 dst_format = 0;\r
u8 dst_rb_swp = 0;\r
u8 dst_a_swp = 0;\r
- \r
+\r
bRGA_MODE_CTL = (u32 *)(base + RGA_MODE_CTRL_OFFSET);\r
- \r
- reg = ((reg & (~m_RGA_MODE_CTRL_2D_RENDER_MODE)) | (s_RGA_MODE_CTRL_2D_RENDER_MODE(msg->render_mode))); \r
+\r
+ reg = ((reg & (~m_RGA_MODE_CTRL_2D_RENDER_MODE)) | (s_RGA_MODE_CTRL_2D_RENDER_MODE(msg->render_mode)));\r
\r
/* src info set */\r
- \r
+\r
if (msg->render_mode == color_palette_mode || msg->render_mode == update_palette_table_mode)\r
{\r
src_format = 0x10 | (msg->palette_mode & 3);\r
{\r
switch (msg->src.format)\r
{\r
- case RK_FORMAT_RGBA_8888 : src_format = 0x0; break; \r
- case RK_FORMAT_RGBA_4444 : src_format = 0x3; break; \r
- case RK_FORMAT_RGBA_5551 : src_format = 0x2; break; \r
- case RK_FORMAT_BGRA_8888 : src_format = 0x0; src_rb_swp = 0x1; break; \r
- case RK_FORMAT_RGBX_8888 : src_format = 0x0; break; \r
+ case RK_FORMAT_RGBA_8888 : src_format = 0x0; break;\r
+ case RK_FORMAT_RGBA_4444 : src_format = 0x3; break;\r
+ case RK_FORMAT_RGBA_5551 : src_format = 0x2; break;\r
+ case RK_FORMAT_BGRA_8888 : src_format = 0x0; src_rb_swp = 0x1; break;\r
+ case RK_FORMAT_RGBX_8888 : src_format = 0x0; break;\r
case RK_FORMAT_RGB_565 : src_format = 0x1; break;\r
case RK_FORMAT_RGB_888 : src_format = 0x0; src_rgb_pack = 1; break;\r
case RK_FORMAT_BGR_888 : src_format = 0x0; src_rgb_pack = 1; src_rb_swp = 1; break;\r
- \r
- case RK_FORMAT_YCbCr_422_SP : src_format = 0x4; break; \r
- case RK_FORMAT_YCbCr_422_P : src_format = 0x5; break; \r
- case RK_FORMAT_YCbCr_420_SP : src_format = 0x6; break; \r
+\r
+ case RK_FORMAT_YCbCr_422_SP : src_format = 0x4; break;\r
+ case RK_FORMAT_YCbCr_422_P : src_format = 0x5; break;\r
+ case RK_FORMAT_YCbCr_420_SP : src_format = 0x6; break;\r
case RK_FORMAT_YCbCr_420_P : src_format = 0x7; break;\r
\r
- case RK_FORMAT_YCrCb_422_SP : src_format = 0x4; src_cbcr_swp = 1; break; \r
- case RK_FORMAT_YCrCb_422_P : src_format = 0x5; src_cbcr_swp = 1; break; \r
- case RK_FORMAT_YCrCb_420_SP : src_format = 0x6; src_cbcr_swp = 1; break; \r
+ case RK_FORMAT_YCrCb_422_SP : src_format = 0x4; src_cbcr_swp = 1; break;\r
+ case RK_FORMAT_YCrCb_422_P : src_format = 0x5; src_cbcr_swp = 1; break;\r
+ case RK_FORMAT_YCrCb_420_SP : src_format = 0x6; src_cbcr_swp = 1; break;\r
case RK_FORMAT_YCrCb_420_P : src_format = 0x7; src_cbcr_swp = 1; break;\r
- } \r
+ }\r
}\r
\r
src_a_swp = msg->src.alpha_swap & 1;\r
\r
- reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RGB_PACK)) | (s_RGA_MODE_CTRL_SRC_RGB_PACK(src_rgb_pack))); \r
+ reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RGB_PACK)) | (s_RGA_MODE_CTRL_SRC_RGB_PACK(src_rgb_pack)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_SRC_FORMAT)) | (s_RGA_MODE_CTRL_SRC_FORMAT(src_format)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_SRC_RB_SWAP)) | (s_RGA_MODE_CTRL_SRC_RB_SWAP(src_rb_swp)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_SRC_ALPHA_SWAP)) | (s_RGA_MODE_CTRL_SRC_ALPHA_SWAP(src_a_swp)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_SRC_UV_SWAP_MODE )) | (s_RGA_MODE_CTRL_SRC_UV_SWAP_MODE (src_cbcr_swp)));\r
- \r
- \r
- /* YUV2RGB MODE */ \r
+\r
+\r
+ /* YUV2RGB MODE */\r
reg = ((reg & (~m_RGA_MODE_CTRL_YUV2RGB_CON_MODE)) | (s_RGA_MODE_CTRL_YUV2RGB_CON_MODE(msg->yuv2rgb_mode)));\r
\r
/* ROTATE MODE */\r
/* COLOR FILL MODE */\r
reg = ((reg & (~m_RGA_MODE_CTRL_PAT_SEL)) | (s_RGA_MODE_CTRL_PAT_SEL(msg->color_fill_mode)));\r
\r
- \r
+\r
if ((msg->render_mode == update_palette_table_mode)||(msg->render_mode == update_patten_buff_mode))\r
{\r
dst_format = msg->pat.format;\r
{\r
dst_format = (u8)msg->dst.format;\r
}\r
- \r
- /* dst info set */ \r
+\r
+ /* dst info set */\r
switch (dst_format)\r
{\r
case RK_FORMAT_BGRA_8888 : dst_format = 0x0; dst_rb_swp = 0x1; break;\r
}\r
\r
dst_a_swp = msg->dst.alpha_swap & 1;\r
- \r
- reg = ((reg & (~m_RGA_MODE_CTRL_DST_FORMAT)) | (s_RGA_MODE_CTRL_DST_FORMAT(dst_format))); \r
+\r
+ reg = ((reg & (~m_RGA_MODE_CTRL_DST_FORMAT)) | (s_RGA_MODE_CTRL_DST_FORMAT(dst_format)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_DST_RGB_PACK)) | (s_RGA_MODE_CTRL_DST_RGB_PACK(dst_rgb_pack)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_DST_RB_SWAP)) | (s_RGA_MODE_CTRL_DST_RB_SWAP(dst_rb_swp)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_DST_ALPHA_SWAP)) | (s_RGA_MODE_CTRL_DST_ALPHA_SWAP(dst_a_swp)));\r
- reg = ((reg & (~m_RGA_MODE_CTRL_LUT_ENDIAN_MODE)) | (s_RGA_MODE_CTRL_LUT_ENDIAN_MODE(msg->endian_mode & 1))); \r
+ reg = ((reg & (~m_RGA_MODE_CTRL_LUT_ENDIAN_MODE)) | (s_RGA_MODE_CTRL_LUT_ENDIAN_MODE(msg->endian_mode & 1)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_SRC_TRANS_MODE)) | (s_RGA_MODE_CTRL_SRC_TRANS_MODE(msg->src_trans_mode)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_ZERO_MODE_ENABLE)) | (s_RGA_MODE_CTRL_ZERO_MODE_ENABLE(msg->alpha_rop_mode >> 4)));\r
reg = ((reg & (~m_RGA_MODE_CTRL_DST_ALPHA_ENABLE)) | (s_RGA_MODE_CTRL_DST_ALPHA_ENABLE(msg->alpha_rop_mode >> 5)));\r
\r
*bRGA_MODE_CTL = reg;\r
- \r
+\r
}\r
\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_src \r
-Description: \r
- fill src relate reg info \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_set_src\r
+Description:\r
+ fill src relate reg info\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
void\r
RGA_set_src(u8 *base, const struct rga_req *msg)\r
-{ \r
+{\r
u32 *bRGA_SRC_VIR_INFO;\r
u32 *bRGA_SRC_ACT_INFO;\r
u32 *bRGA_SRC_Y_MST;\r
u32 pixel_width;\r
\r
uv_x_off = uv_y_off = uv_stride = 0;\r
- \r
+\r
bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);\r
bRGA_SRC_CB_MST = (u32 *)(base + RGA_SRC_CB_MST_OFFSET);\r
bRGA_SRC_CR_MST = (u32 *)(base + RGA_SRC_CR_MST_OFFSET);\r
y_off = msg->src.y_offset;\r
\r
pixel_width = RGA_pixel_width_init(msg->src.format);\r
- \r
+\r
stride = ((msg->src.vir_w * pixel_width) + 3) & (~3);\r
\r
switch(msg->src.format)\r
{\r
- case RK_FORMAT_YCbCr_422_SP : \r
- uv_stride = stride; \r
- uv_x_off = x_off; \r
- uv_y_off = y_off; \r
+ case RK_FORMAT_YCbCr_422_SP :\r
+ uv_stride = stride;\r
+ uv_x_off = x_off;\r
+ uv_y_off = y_off;\r
break;\r
case RK_FORMAT_YCbCr_422_P :\r
uv_stride = stride >> 1;\r
uv_stride = stride >> 1;\r
uv_x_off = x_off >> 1;\r
uv_y_off = y_off >> 1;\r
- break; \r
- } \r
+ break;\r
+ }\r
\r
\r
- /* src addr set */ \r
+ /* src addr set */\r
*bRGA_SRC_Y_MST = msg->src.yrgb_addr + (y_off * stride) + (x_off * pixel_width);\r
*bRGA_SRC_CB_MST = msg->src.uv_addr + uv_y_off * uv_stride + uv_x_off;\r
*bRGA_SRC_CR_MST = msg->src.v_addr + uv_y_off * uv_stride + uv_x_off;\r
\r
byte_num = sw >> shift;\r
stride = (byte_num + 3) & (~3);\r
- } \r
+ }\r
\r
- /* src act window / vir window set */ \r
+ /* src act window / vir window set */\r
*bRGA_SRC_VIR_INFO = ((stride >> 2) | (msg->src.vir_h)<<16);\r
*bRGA_SRC_ACT_INFO = ((msg->src.act_w-1) | (msg->src.act_h-1)<<16);\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_dst \r
-Description: \r
- fill dst relate reg info \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_set_dst\r
+Description:\r
+ fill dst relate reg info\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
s32 RGA_set_dst(u8 *base, const struct rga_req *msg)\r
{\r
u32 *bRGA_DST_MST;\r
+ u32 *bRGA_DST_UV_MST;\r
u32 *bRGA_DST_VIR_INFO;\r
u32 *bRGA_DST_CTR_INFO;\r
u32 *bRGA_PRESCL_CB_MST;\r
u32 *bRGA_PRESCL_CR_MST;\r
+ u32 *bRGA_YUV_OUT_CFG;\r
+\r
u32 reg = 0;\r
\r
u8 pw;\r
u16 stride, rop_mask_stride;\r
\r
bRGA_DST_MST = (u32 *)(base + RGA_DST_MST_OFFSET);\r
+ bRGA_DST_UV_MST = (u32 *)(base + RGA_DST_UV_MST_OFFSET);\r
bRGA_DST_VIR_INFO = (u32 *)(base + RGA_DST_VIR_INFO_OFFSET);\r
bRGA_DST_CTR_INFO = (u32 *)(base + RGA_DST_CTR_INFO_OFFSET);\r
bRGA_PRESCL_CB_MST = (u32 *)(base + RGA_PRESCL_CB_MST_OFFSET);\r
bRGA_PRESCL_CR_MST = (u32 *)(base + RGA_PRESCL_CR_MST_OFFSET);\r
+ bRGA_YUV_OUT_CFG = (u32 *)(base + RGA_YUV_OUT_CFG_OFFSET);\r
\r
pw = RGA_pixel_width_init(msg->dst.format);\r
\r
\r
*bRGA_DST_MST = (u32)msg->dst.yrgb_addr + (y_off * stride) + (x_off * pw);\r
\r
- if (msg->render_mode == pre_scaling_mode)\r
+ *bRGA_DST_UV_MST = 0;\r
+ *bRGA_YUV_OUT_CFG = 0;\r
+ switch(msg->dst.format)\r
{\r
- switch(msg->dst.format)\r
- {\r
- case RK_FORMAT_YCbCr_422_SP : \r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);\r
- break;\r
- case RK_FORMAT_YCbCr_422_P :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
- *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
- break;\r
- case RK_FORMAT_YCbCr_420_SP :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);\r
- break;\r
- case RK_FORMAT_YCbCr_420_P :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
- *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
- break;\r
- case RK_FORMAT_YCrCb_422_SP :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);\r
- break;\r
- case RK_FORMAT_YCrCb_422_P :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
- *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
- break;\r
- case RK_FORMAT_YCrCb_420_SP :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);\r
- break;\r
- case RK_FORMAT_YCrCb_420_P :\r
- *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
- *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
- break; \r
- } \r
+ case RK_FORMAT_YCbCr_422_SP :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);\r
+ *bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off));\r
+ *bRGA_YUV_OUT_CFG |= (0 << 3) | 1 | (((msg->yuv2rgb_mode >> 4) & 3) << 4);\r
+ break;\r
+ case RK_FORMAT_YCbCr_422_P :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
+ *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
+ break;\r
+ case RK_FORMAT_YCbCr_420_SP :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);\r
+ *bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off));\r
+ *bRGA_YUV_OUT_CFG |= (0 << 3)|(1 << 1) | 1 | (((msg->yuv2rgb_mode >> 4) & 3) << 4);\r
+ break;\r
+ case RK_FORMAT_YCbCr_420_P :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
+ *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
+ break;\r
+ case RK_FORMAT_YCrCb_422_SP :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off) * pw);\r
+ *bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off));\r
+ *bRGA_YUV_OUT_CFG |= (1 << 3)|(0 << 1) | 1 | (((msg->yuv2rgb_mode >> 4) & 3) << 4);\r
+ break;\r
+ case RK_FORMAT_YCrCb_422_P :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
+ *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off) * stride) + ((x_off>>1) * pw);\r
+ break;\r
+ case RK_FORMAT_YCrCb_420_SP :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off) * pw);\r
+ *bRGA_DST_UV_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off));\r
+ *bRGA_YUV_OUT_CFG |= (1 << 3)|(1 << 1) | 1 | (((msg->yuv2rgb_mode >> 4) & 3) << 4);\r
+ break;\r
+ case RK_FORMAT_YCrCb_420_P :\r
+ *bRGA_PRESCL_CB_MST = (u32)msg->dst.uv_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
+ *bRGA_PRESCL_CR_MST = (u32)msg->dst.v_addr + ((y_off>>1) * stride) + ((x_off>>1) * pw);\r
+ break;\r
}\r
\r
rop_mask_stride = (((msg->src.vir_w + 7)>>3) + 3) & (~3);//not dst_vir.w,hxx,2011.7.21\r
- \r
+\r
reg = (stride >> 2) & 0xffff;\r
reg = reg | ((rop_mask_stride>>2) << 16);\r
\r
if (msg->render_mode == line_point_drawing_mode)\r
{\r
reg &= 0xffff;\r
- reg = reg | (msg->dst.vir_h << 16); \r
+ reg = reg | (msg->dst.vir_h << 16);\r
}\r
\r
*bRGA_DST_VIR_INFO = reg;\r
*bRGA_DST_CTR_INFO = (msg->dst.act_w - 1) | ((msg->dst.act_h - 1) << 16);\r
\r
- return 0; \r
+ if (msg->render_mode == pre_scaling_mode) {\r
+ *bRGA_YUV_OUT_CFG &= 0xfffffffe;\r
+ }\r
+\r
+ return 0;\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_alpha_rop \r
-Description: \r
- fill alpha rop some relate reg bit \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_set_alpha_rop\r
+Description:\r
+ fill alpha rop some relate reg bit\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
void\r
RGA_set_alpha_rop(u8 *base, const struct rga_req *msg)\r
u32 *bRGA_ROP_CON1;\r
u32 reg = 0;\r
u32 rop_con0, rop_con1;\r
- \r
+\r
u8 rop_mode = (msg->alpha_rop_mode) & 3;\r
u8 alpha_mode = msg->alpha_rop_mode & 3;\r
\r
rop_con0 = rop_con1 = 0;\r
- \r
+\r
bRGA_ALPHA_CON = (u32 *)(base + RGA_ALPHA_CON_OFFSET);\r
\r
reg = ((reg & (~m_RGA_ALPHA_CON_ENABLE) )| (s_RGA_ALPHA_CON_ENABLE(msg->alpha_rop_flag & 1)));\r
reg = ((reg & (~m_RGA_ALPHA_CON_DITHER_ENABLE)) | (s_RGA_ALPHA_CON_DITHER_ENABLE(msg->alpha_rop_flag >> 5)));\r
reg = ((reg & (~m_RGA_ALPHA_CON_GRADIENT_CAL_MODE)) | (s_RGA_ALPHA_CON_GRADIENT_CAL_MODE(msg->alpha_rop_flag >> 6)));\r
reg = ((reg & (~m_RGA_ALPHA_CON_AA_SEL)) | (s_RGA_ALPHA_CON_AA_SEL(msg->alpha_rop_flag >> 7)));\r
- \r
+\r
*bRGA_ALPHA_CON = reg;\r
\r
- if(rop_mode == 0) { \r
+ if(rop_mode == 0) {\r
rop_con0 = ROP3_code[(msg->rop_code & 0xff)];\r
}\r
else if(rop_mode == 1) {\r
rop_con0 = ROP3_code[(msg->rop_code & 0xff)];\r
rop_con1 = ROP3_code[(msg->rop_code & 0xff00)>>8];\r
}\r
- \r
+\r
bRGA_ROP_CON0 = (u32 *)(base + RGA_ROP_CON0_OFFSET);\r
bRGA_ROP_CON1 = (u32 *)(base + RGA_ROP_CON1_OFFSET);\r
\r
*bRGA_ROP_CON0 = (u32)rop_con0;\r
- *bRGA_ROP_CON1 = (u32)rop_con1; \r
+ *bRGA_ROP_CON1 = (u32)rop_con1;\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_color \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_color\r
+Description:\r
fill color some relate reg bit\r
bg_color/fg_color\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
void\r
u32 *bRGA_SRC_TR_COLOR1;\r
u32 *bRGA_SRC_BG_COLOR;\r
u32 *bRGA_SRC_FG_COLOR;\r
- \r
- \r
+\r
+\r
bRGA_SRC_BG_COLOR = (u32 *)(base + RGA_SRC_BG_COLOR_OFFSET);\r
bRGA_SRC_FG_COLOR = (u32 *)(base + RGA_SRC_FG_COLOR_OFFSET);\r
- \r
+\r
*bRGA_SRC_BG_COLOR = msg->bg_color; /* 1bpp 0 */\r
*bRGA_SRC_FG_COLOR = msg->fg_color; /* 1bpp 1 */\r
- \r
- bRGA_SRC_TR_COLOR0 = (u32 *)(base + RGA_SRC_TR_COLOR0_OFFSET); \r
+\r
+ bRGA_SRC_TR_COLOR0 = (u32 *)(base + RGA_SRC_TR_COLOR0_OFFSET);\r
bRGA_SRC_TR_COLOR1 = (u32 *)(base + RGA_SRC_TR_COLOR1_OFFSET);\r
\r
*bRGA_SRC_TR_COLOR0 = msg->color_key_min;\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_fading \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_fading\r
+Description:\r
fill fading some relate reg bit\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
s32\r
\r
reg = (r<<8) | (g<<16) | (b<<24) | reg;\r
\r
- *bRGA_FADING_CON = reg; \r
- \r
+ *bRGA_FADING_CON = reg;\r
+\r
return 0;\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_pat \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_pat\r
+Description:\r
fill patten some relate reg bit\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
s32\r
bRGA_PAT_START_POINT = (u32 *)(base + RGA_PAT_START_POINT_OFFSET);\r
\r
bRGA_PAT_CON = (u32 *)(base + RGA_PAT_CON_OFFSET);\r
- \r
+\r
*bRGA_PAT_START_POINT = (msg->pat.act_w * msg->pat.y_offset) + msg->pat.x_offset;\r
\r
reg = (msg->pat.act_w - 1) | ((msg->pat.act_h - 1) << 8) | (msg->pat.x_offset << 16) | (msg->pat.y_offset << 24);\r
\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_bitblt_reg_info \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_bitblt_reg_info\r
+Description:\r
fill bitblt mode relate ren info\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
-void \r
+void\r
RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)\r
{\r
u32 *bRGA_SRC_Y_MST;\r
\r
bRGA_SRC_X_PARA = (u32 *)(base + RGA_SRC_X_PARA_OFFSET);\r
bRGA_SRC_Y_PARA = (u32 *)(base + RGA_SRC_Y_PARA_OFFSET);\r
- \r
+\r
bRGA_SRC_TILE_XINFO = (u32 *)(base + RGA_SRC_TILE_XINFO_OFFSET);\r
bRGA_SRC_TILE_YINFO = (u32 *)(base + RGA_SRC_TILE_YINFO_OFFSET);\r
bRGA_SRC_TILE_H_INCR = (u32 *)(base + RGA_SRC_TILE_H_INCR_OFFSET);\r
- bRGA_SRC_TILE_V_INCR = (u32 *)(base + RGA_SRC_TILE_V_INCR_OFFSET); \r
+ bRGA_SRC_TILE_V_INCR = (u32 *)(base + RGA_SRC_TILE_V_INCR_OFFSET);\r
bRGA_SRC_TILE_OFFSETX = (u32 *)(base + RGA_SRC_TILE_OFFSETX_OFFSET);\r
bRGA_SRC_TILE_OFFSETY = (u32 *)(base + RGA_SRC_TILE_OFFSETY_OFFSET);\r
\r
bRGA_DST_MST = (u32 *)(base + RGA_DST_MST_OFFSET);\r
bRGA_DST_CTR_INFO = (u32 *)(base + RGA_DST_CTR_INFO_OFFSET);\r
\r
- /* Matrix reg fill */ \r
+ /* Matrix reg fill */\r
m0 = (s32)(tile->matrix[0] >> 18);\r
m1 = (s32)(tile->matrix[1] >> 18);\r
m2 = (s32)(tile->matrix[2] >> 18);\r
\r
*bRGA_SRC_X_PARA = (m0 & 0xffff) | (m2 << 16);\r
*bRGA_SRC_Y_PARA = (m1 & 0xffff) | (m3 << 16);\r
- \r
- /* src tile information setting */ \r
+\r
+ /* src tile information setting */\r
if(msg->rotate_mode != 0)//add by hxx,2011.7.12,for rtl0707,when line scanning ,do not calc src tile info\r
{\r
*bRGA_SRC_TILE_XINFO = (tile->tile_start_x_coor & 0xffff) | (tile->tile_w << 16);\r
}\r
\r
pixel_width = RGA_pixel_width_init(msg->src.format);\r
- \r
+\r
stride = ((msg->src.vir_w * pixel_width) + 3) & (~3);\r
\r
if ((msg->rotate_mode == 1)||(msg->rotate_mode == 2)||(msg->rotate_mode == 3))\r
pos[6] >>= 11;\r
pos[7] >>= 11;\r
\r
- xmax = (MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]) + 1); \r
- xmin = (MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6])); \r
+ xmax = (MAX(MAX(MAX(pos[0], pos[2]), pos[4]), pos[6]) + 1);\r
+ xmin = (MIN(MIN(MIN(pos[0], pos[2]), pos[4]), pos[6]));\r
\r
- ymax = (MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]) + 1); \r
- ymin = (MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7])); \r
+ ymax = (MAX(MAX(MAX(pos[1], pos[3]), pos[5]), pos[7]) + 1);\r
+ ymin = (MIN(MIN(MIN(pos[1], pos[3]), pos[5]), pos[7]));\r
\r
xp = xmin + msg->src.x_offset;\r
yp = ymin + msg->src.y_offset;\r
xp = CLIP(xp, msg->src.x_offset, msg->src.x_offset + msg->src.act_w - 1);\r
yp = CLIP(yp, msg->src.y_offset, msg->src.y_offset + msg->src.act_h - 1);\r
}\r
- \r
+\r
switch(msg->src.format)\r
- { \r
+ {\r
case RK_FORMAT_YCbCr_420_P :\r
y_addr = msg->src.yrgb_addr + yp*stride + xp;\r
u_addr = msg->src.uv_addr + (yp>>1)*(stride>>1) + (xp>>1);\r
break;\r
case RK_FORMAT_YCbCr_420_SP :\r
y_addr = msg->src.yrgb_addr + yp*stride + xp;\r
- u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1); \r
+ u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1);\r
break;\r
- case RK_FORMAT_YCbCr_422_P : \r
+ case RK_FORMAT_YCbCr_422_P :\r
y_addr = msg->src.yrgb_addr + yp*stride + xp;\r
u_addr = msg->src.uv_addr + (yp)*(stride>>1) + (xp>>1);\r
v_addr = msg->src.v_addr + (yp)*(stride>>1) + (xp>>1);\r
break;\r
case RK_FORMAT_YCrCb_420_SP :\r
y_addr = msg->src.yrgb_addr + yp*stride + xp;\r
- u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1); \r
+ u_addr = msg->src.uv_addr + (yp>>1)*stride + ((xp>>1)<<1);\r
break;\r
- case RK_FORMAT_YCrCb_422_P : \r
+ case RK_FORMAT_YCrCb_422_P :\r
y_addr = msg->src.yrgb_addr + yp*stride + xp;\r
u_addr = msg->src.uv_addr + (yp)*(stride>>1) + (xp>>1);\r
v_addr = msg->src.v_addr + (yp)*(stride>>1) + (xp>>1);\r
case RK_FORMAT_YCrCb_422_SP:\r
y_addr = msg->src.yrgb_addr + yp*stride + xp;\r
u_addr = msg->src.uv_addr + yp*stride + ((xp>>1)<<1);\r
- break; \r
+ break;\r
default :\r
y_addr = msg->src.yrgb_addr + yp*stride + xp*pixel_width;\r
break;\r
*bRGA_SRC_CB_MST = u_addr;\r
*bRGA_SRC_CR_MST = v_addr;\r
}\r
- \r
+\r
/*dst info*/\r
pixel_width = RGA_pixel_width_init(msg->dst.format);\r
stride = (msg->dst.vir_w * pixel_width + 3) & (~3);\r
*bRGA_DST_MST = (u32)msg->dst.yrgb_addr + (tile->dst_ctrl.y_off * stride) + (tile->dst_ctrl.x_off * pixel_width);\r
*bRGA_DST_CTR_INFO = (tile->dst_ctrl.w) | ((tile->dst_ctrl.h) << 16);\r
- \r
+\r
*bRGA_DST_CTR_INFO |= ((1<<29) | (1<<28));\r
}\r
\r
\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_color_palette_reg_info \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_color_palette_reg_info\r
+Description:\r
fill color palette process some relate reg bit\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
void\r
y_off = msg->src.y_offset;\r
\r
sw = msg->src.vir_w;\r
- shift = 3 - (msg->palette_mode & 3); \r
+ shift = 3 - (msg->palette_mode & 3);\r
byte_num = sw >> shift;\r
src_stride = (byte_num + 3) & (~3);\r
- \r
- p = msg->src.yrgb_addr; \r
+\r
+ p = msg->src.yrgb_addr;\r
p = p + (x_off>>shift) + y_off*src_stride;\r
\r
- bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET); \r
- *bRGA_SRC_Y_MST = (u32)p; \r
+ bRGA_SRC_Y_MST = (u32 *)(base + RGA_SRC_Y_MST_OFFSET);\r
+ *bRGA_SRC_Y_MST = (u32)p;\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_color_fill_reg_info \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_color_fill_reg_info\r
+Description:\r
fill color fill process some relate reg bit\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
void\r
RGA_set_color_fill_reg_info(u8 *base, const struct rga_req *msg)\r
*bRGA_CP_GR_R = (msg->gr_color.gr_x_r & 0xffff) | (msg->gr_color.gr_y_r << 16);\r
\r
*bRGA_PAT_CON = (msg->pat.vir_w-1) | ((msg->pat.vir_h-1) << 8) | (msg->pat.x_offset << 16) | (msg->pat.y_offset << 24);\r
- \r
+\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_line_drawing_reg_info \r
-Description: \r
+/*************************************************************\r
+Func:\r
+ RGA_set_line_drawing_reg_info\r
+Description:\r
fill line drawing process some relate reg bit\r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
s32 RGA_set_line_drawing_reg_info(u8 *base, const struct rga_req *msg)\r
u32 *bRGA_DST_VIR_INFO;\r
u32 *bRGA_LINE_DRAW_XY_INFO;\r
u32 *bRGA_LINE_DRAW_WIDTH;\r
- u32 *bRGA_LINE_DRAWING_COLOR; \r
+ u32 *bRGA_LINE_DRAWING_COLOR;\r
u32 *bRGA_LINE_DRAWING_MST;\r
- \r
+\r
u32 reg = 0;\r
\r
s16 x_width, y_width;\r
u32 start_addr;\r
u8 line_dir, dir_major, dir_semi_major;\r
u16 major_width;\r
- \r
+\r
bRGA_LINE_DRAW = (u32 *)(base + RGA_LINE_DRAW_OFFSET);\r
bRGA_DST_VIR_INFO = (u32 *)(base + RGA_DST_VIR_INFO_OFFSET);\r
bRGA_LINE_DRAW_XY_INFO = (u32 *)(base + RGA_LINE_DRAW_XY_INFO_OFFSET);\r
\r
stride = (msg->dst.vir_w * pw + 3) & (~3);\r
\r
- start_addr = msg->dst.yrgb_addr \r
- + (msg->line_draw_info.start_point.y * stride) \r
+ start_addr = msg->dst.yrgb_addr\r
+ + (msg->line_draw_info.start_point.y * stride)\r
+ (msg->line_draw_info.start_point.x * pw);\r
\r
x_width = msg->line_draw_info.start_point.x - msg->line_draw_info.end_point.x;\r
y_width = msg->line_draw_info.start_point.y - msg->line_draw_info.end_point.y;\r
\r
abs_x = abs(x_width);\r
- abs_y = abs(y_width); \r
- \r
+ abs_y = abs(y_width);\r
+\r
if (abs_x >= abs_y)\r
{\r
if (y_width > 0)\r
else\r
dir_semi_major = 0;\r
\r
- if (x_width > 0) \r
- dir_major = 1; \r
+ if (x_width > 0)\r
+ dir_major = 1;\r
else\r
dir_major = 0;\r
\r
- if((abs_x == 0)||(abs_y == 0)) \r
- delta = 0; \r
- else \r
+ if((abs_x == 0)||(abs_y == 0))\r
+ delta = 0;\r
+ else\r
delta = (abs_y<<12)/abs_x;\r
\r
if (delta >> 12)\r
delta -= 1;\r
- \r
- major_width = abs_x; \r
+\r
+ major_width = abs_x;\r
line_dir = 0;\r
}\r
else\r
dir_major = 1;\r
else\r
dir_major = 0;\r
- \r
- delta = (abs_x<<12)/abs_y; \r
+\r
+ delta = (abs_x<<12)/abs_y;\r
major_width = abs_y;\r
line_dir = 1;\r
}\r
- \r
+\r
reg = (reg & (~m_RGA_LINE_DRAW_MAJOR_WIDTH)) | (s_RGA_LINE_DRAW_MAJOR_WIDTH(major_width));\r
reg = (reg & (~m_RGA_LINE_DRAW_LINE_DIRECTION)) | (s_RGA_LINE_DRAW_LINE_DIRECTION(line_dir));\r
reg = (reg & (~m_RGA_LINE_DRAW_LINE_WIDTH)) | (s_RGA_LINE_DRAW_LINE_WIDTH(msg->line_draw_info.line_width - 1));\r
- reg = (reg & (~m_RGA_LINE_DRAW_INCR_VALUE)) | (s_RGA_LINE_DRAW_INCR_VALUE(delta)); \r
+ reg = (reg & (~m_RGA_LINE_DRAW_INCR_VALUE)) | (s_RGA_LINE_DRAW_INCR_VALUE(delta));\r
reg = (reg & (~m_RGA_LINE_DRAW_DIR_SEMI_MAJOR)) | (s_RGA_LINE_DRAW_DIR_SEMI_MAJOR(dir_semi_major));\r
reg = (reg & (~m_RGA_LINE_DRAW_DIR_MAJOR)) | (s_RGA_LINE_DRAW_DIR_MAJOR(dir_major));\r
reg = (reg & (~m_RGA_LINE_DRAW_LAST_POINT)) | (s_RGA_LINE_DRAW_LAST_POINT(msg->line_draw_info.flag >> 1));\r
- reg = (reg & (~m_RGA_LINE_DRAW_ANTI_ALISING)) | (s_RGA_LINE_DRAW_ANTI_ALISING(msg->line_draw_info.flag)); \r
+ reg = (reg & (~m_RGA_LINE_DRAW_ANTI_ALISING)) | (s_RGA_LINE_DRAW_ANTI_ALISING(msg->line_draw_info.flag));\r
\r
*bRGA_LINE_DRAW = reg;\r
- \r
+\r
reg = (msg->line_draw_info.start_point.x & 0xfff) | ((msg->line_draw_info.start_point.y & 0xfff) << 16);\r
*bRGA_LINE_DRAW_XY_INFO = reg;\r
- \r
+\r
*bRGA_LINE_DRAW_WIDTH = msg->dst.vir_w;\r
\r
*bRGA_LINE_DRAWING_COLOR = msg->line_draw_info.color;\r
\r
*bRGA_LINE_DRAWING_MST = (u32)start_addr;\r
- \r
+\r
return 0;\r
}\r
\r
/*full*/\r
s32\r
RGA_set_filter_reg_info(u8 *base, const struct rga_req *msg)\r
-{ \r
+{\r
u32 *bRGA_BLUR_SHARP_INFO;\r
u32 reg = 0;\r
- \r
+\r
bRGA_BLUR_SHARP_INFO = (u32 *)(base + RGA_ALPHA_CON_OFFSET);\r
\r
reg = *bRGA_BLUR_SHARP_INFO;\r
reg = ((reg & (~m_RGA_BLUR_SHARP_FILTER_MODE)) | (s_RGA_BLUR_SHARP_FILTER_MODE(msg->bsfilter_flag >>2)));\r
\r
*bRGA_BLUR_SHARP_INFO = reg;\r
- \r
- return 0; \r
+\r
+ return 0;\r
}\r
\r
\r
s32\r
RGA_set_pre_scale_reg_info(u8 *base, const struct rga_req *msg)\r
{\r
- u32 *bRGA_PRE_SCALE_INFO; \r
+ u32 *bRGA_PRE_SCALE_INFO;\r
u32 reg = 0;\r
u32 h_ratio = 0;\r
u32 v_ratio = 0;\r
if((dst_width == 0) || (dst_height == 0))\r
{\r
printk("pre scale reg info error ratio is divide zero\n");\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
h_ratio = (src_width <<16) / dst_width;\r
v_ratio = (src_height<<16) / dst_height;\r
\r
- if (h_ratio <= (1<<16)) \r
+ if (h_ratio <= (1<<16))\r
h_ratio = 0;\r
else if (h_ratio <= (2<<16))\r
h_ratio = 1;\r
else if (h_ratio <= (8<<16))\r
h_ratio = 3;\r
\r
- if (v_ratio <= (1<<16)) \r
+ if (v_ratio <= (1<<16))\r
v_ratio = 0;\r
else if (v_ratio <= (2<<16))\r
v_ratio = 1;\r
v_ratio = 3;\r
\r
if(msg->src.format == msg->dst.format)\r
- ps_yuv_flag = 0; \r
- else \r
- ps_yuv_flag = 1; \r
+ ps_yuv_flag = 0;\r
+ else\r
+ ps_yuv_flag = 1;\r
\r
bRGA_PRE_SCALE_INFO = (u32 *)(base + RGA_ALPHA_CON_OFFSET);\r
- \r
+\r
reg = *bRGA_PRE_SCALE_INFO;\r
reg = ((reg & (~m_RGA_PRE_SCALE_HOR_RATIO)) | (s_RGA_PRE_SCALE_HOR_RATIO((u8)h_ratio)));\r
reg = ((reg & (~m_RGA_PRE_SCALE_VER_RATIO)) | (s_RGA_PRE_SCALE_VER_RATIO((u8)v_ratio)));\r
reg = ((reg & (~m_RGA_PRE_SCALE_OUTPUT_FORMAT)) | (s_RGA_PRE_SCALE_OUTPUT_FORMAT(ps_yuv_flag)));\r
\r
*bRGA_PRE_SCALE_INFO = reg;\r
- \r
- return 0; \r
+\r
+ return 0;\r
}\r
\r
\r
\r
/*full*/\r
-int \r
+int\r
RGA_set_update_palette_table_reg_info(u8 *base, const struct rga_req *msg)\r
{\r
u32 *bRGA_LUT_MST;\r
\r
- if (!msg->LUT_addr) { \r
+ if (!msg->LUT_addr) {\r
return -1;\r
- } \r
+ }\r
\r
bRGA_LUT_MST = (u32 *)(base + RGA_LUT_MST_OFFSET);\r
- \r
- *bRGA_LUT_MST = (u32)msg->LUT_addr; \r
+\r
+ *bRGA_LUT_MST = (u32)msg->LUT_addr;\r
\r
return 0;\r
}\r
\r
if ( !pat->yrgb_addr ) {\r
return -1;\r
- } \r
+ }\r
*bRGA_PAT_MST = (u32)pat->yrgb_addr;\r
\r
if ((pat->vir_w > 256)||(pat->x_offset > 256)||(pat->y_offset > 256)) {\r
*bRGA_PAT_START_POINT = (pat->vir_w * pat->y_offset) + pat->x_offset;\r
\r
reg = (pat->vir_w-1) | ((pat->vir_h-1) << 8) | (pat->x_offset << 16) | (pat->y_offset << 24);\r
- *bRGA_PAT_CON = reg; \r
- \r
+ *bRGA_PAT_CON = reg;\r
+\r
return 0;\r
}\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_set_mmu_ctrl_reg_info \r
-Description: \r
- fill mmu relate some reg info \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_set_mmu_ctrl_reg_info\r
+Description:\r
+ fill mmu relate some reg info\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
\r
s32\r
mmu_addr = (u32)msg->mmu_info.base_addr;\r
TLB_size = (msg->mmu_info.mmu_flag >> 4) & 0x3;\r
mmu_enable = msg->mmu_info.mmu_flag & 0x1;\r
- \r
+\r
src_flag = (msg->mmu_info.mmu_flag >> 1) & 0x1;\r
dst_flag = (msg->mmu_info.mmu_flag >> 2) & 0x1;\r
CMD_flag = (msg->mmu_info.mmu_flag >> 3) & 0x1;\r
reg = ((reg & (~m_RGA_MMU_CTRL_TLB_ADDR)) | s_RGA_MMU_CTRL_TLB_ADDR(mmu_addr));\r
*RGA_MMU_TLB = reg;\r
\r
- reg = *RGA_MMU_CTRL_ADDR; \r
+ reg = *RGA_MMU_CTRL_ADDR;\r
reg = ((reg & (~m_RGA_MMU_CTRL_PAGE_TABLE_SIZE)) | s_RGA_MMU_CTRL_PAGE_TABLE_SIZE(TLB_size));\r
reg = ((reg & (~m_RGA_MMU_CTRL_MMU_ENABLE)) | s_RGA_MMU_CTRL_MMU_ENABLE(mmu_enable));\r
reg = ((reg & (~m_RGA_MMU_CTRL_SRC_FLUSH)) | s_RGA_MMU_CTRL_SRC_FLUSH(1));\r
\r
\r
\r
-/************************************************************* \r
-Func: \r
- RGA_gen_reg_info \r
-Description: \r
- Generate RGA command reg list from rga_req struct. \r
-Author: \r
- ZhangShengqin \r
-Date: \r
- 20012-2-2 10:59:25 \r
+/*************************************************************\r
+Func:\r
+ RGA_gen_reg_info\r
+Description:\r
+ Generate RGA command reg list from rga_req struct.\r
+Author:\r
+ ZhangShengqin\r
+Date:\r
+ 20012-2-2 10:59:25\r
**************************************************************/\r
int\r
RGA_gen_reg_info(const struct rga_req *msg, unsigned char *base)\r
{\r
TILE_INFO tile;\r
\r
- memset(base, 0x0, 28*4); \r
+ memset(base, 0x0, 28*4);\r
RGA_set_mode_ctrl(base, msg);\r
- \r
+\r
switch(msg->render_mode)\r
{\r
case bitblt_mode :\r
RGA_set_alpha_rop(base, msg);\r
RGA_set_src(base, msg);\r
- RGA_set_dst(base, msg); \r
+ RGA_set_dst(base, msg);\r
RGA_set_color(base, msg);\r
RGA_set_fading(base, msg);\r
- RGA_set_pat(base, msg); \r
+ RGA_set_pat(base, msg);\r
matrix_cal(msg, &tile);\r
dst_ctrl_cal(msg, &tile);\r
src_tile_info_cal(msg, &tile);\r
- RGA_set_bitblt_reg_info(base, msg, &tile); \r
+ RGA_set_bitblt_reg_info(base, msg, &tile);\r
break;\r
case color_palette_mode :\r
RGA_set_src(base, msg);\r
- RGA_set_dst(base, msg); \r
+ RGA_set_dst(base, msg);\r
RGA_set_color(base, msg);\r
RGA_set_color_palette_reg_info(base, msg);\r
break;\r
case color_fill_mode :\r
RGA_set_alpha_rop(base, msg);\r
- RGA_set_dst(base, msg); \r
+ RGA_set_dst(base, msg);\r
RGA_set_color(base, msg);\r
RGA_set_pat(base, msg);\r
RGA_set_color_fill_reg_info(base, msg);\r
break;\r
case pre_scaling_mode :\r
RGA_set_src(base, msg);\r
- RGA_set_dst(base, msg); \r
+ RGA_set_dst(base, msg);\r
if(RGA_set_pre_scale_reg_info(base, msg) == -EINVAL)\r
return -1;\r
break;\r
}\r
break;\r
case update_patten_buff_mode:\r
- if (RGA_set_update_patten_buff_reg_info(base, msg)){ \r
+ if (RGA_set_update_patten_buff_reg_info(base, msg)){\r
return -1;\r
}\r
- \r
+\r
break;\r
}\r
\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff