[PATCH] at91_serial -> atmel_serial: Public definitions

[firefly-linux-kernel-4.4.55.git] / include / asm-arm / arch-at91rm9200 / hardware.h

diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h
index 235d39d91107914d0101c1e8b4b8e048f3a8d0c4..9ca4cc9c0b2e707b4f155c9053bde7571ac981f8 100644 (file)
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91rm9200/hardware.h
@@ -34,30 +34,17 @@
  * Virtual to Physical Address mapping for IO devices.
  */
 #define AT91_VA_BASE_SYS       AT91_IO_P2V(AT91_BASE_SYS)
-#define AT91_VA_BASE_SPI       AT91_IO_P2V(AT91_BASE_SPI)
-#define AT91_VA_BASE_SSC2      AT91_IO_P2V(AT91_BASE_SSC2)
-#define AT91_VA_BASE_SSC1      AT91_IO_P2V(AT91_BASE_SSC1)
-#define AT91_VA_BASE_SSC0      AT91_IO_P2V(AT91_BASE_SSC0)
-#define AT91_VA_BASE_US3       AT91_IO_P2V(AT91_BASE_US3)
-#define AT91_VA_BASE_US2       AT91_IO_P2V(AT91_BASE_US2)
-#define AT91_VA_BASE_US1       AT91_IO_P2V(AT91_BASE_US1)
-#define AT91_VA_BASE_US0       AT91_IO_P2V(AT91_BASE_US0)
-#define AT91_VA_BASE_EMAC      AT91_IO_P2V(AT91_BASE_EMAC)
-#define AT91_VA_BASE_TWI       AT91_IO_P2V(AT91_BASE_TWI)
-#define AT91_VA_BASE_MCI       AT91_IO_P2V(AT91_BASE_MCI)
-#define AT91_VA_BASE_UDP       AT91_IO_P2V(AT91_BASE_UDP)
-#define AT91_VA_BASE_TCB1      AT91_IO_P2V(AT91_BASE_TCB1)
-#define AT91_VA_BASE_TCB0      AT91_IO_P2V(AT91_BASE_TCB0)
-
-/* Internal SRAM */
-#define AT91_SRAM_BASE         0x00200000      /* Internal SRAM base address */
-#define AT91_SRAM_SIZE         0x00004000      /* Internal SRAM SIZE (16Kb) */
+#define AT91_VA_BASE_SPI       AT91_IO_P2V(AT91RM9200_BASE_SPI)
+#define AT91_VA_BASE_EMAC      AT91_IO_P2V(AT91RM9200_BASE_EMAC)
+#define AT91_VA_BASE_TWI       AT91_IO_P2V(AT91RM9200_BASE_TWI)
+#define AT91_VA_BASE_MCI       AT91_IO_P2V(AT91RM9200_BASE_MCI)
+#define AT91_VA_BASE_UDP       AT91_IO_P2V(AT91RM9200_BASE_UDP)
 
  /* Internal SRAM is mapped below the IO devices */
-#define AT91_SRAM_VIRT_BASE    (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
+#define AT91_SRAM_VIRT_BASE    (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE)
 
 /* Serial ports */
-#define AT91_NR_UART           5               /* 4 USART3's and one DBGU port */
+#define ATMEL_MAX_UART         5               /* 4 USART3's and one DBGU port */
 
 /* FLASH */
 #define AT91_FLASH_BASE                0x10000000      /* NCS0: Flash physical base address */
@@ -71,9 +58,6 @@
 /* Compact Flash */
 #define AT91_CF_BASE           0x50000000      /* NCS4-NCS6: Compact Flash physical base address */
 
-/* Multi-Master Memory controller */
-#define AT91_UHP_BASE          0x00300000      /* USB Host controller */
-
 /* Clocks */
 #define AT91_SLOW_CLOCK                32768           /* slow clock */