#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
-/* #define RK3399_TWO_PLL_FOR_VOP */
+#define RK3399_TWO_PLL_FOR_VOP
/* core clocks */
#define PLL_APLLL 1
#define SCLK_I2S1_DIV 175
#define SCLK_I2S2_DIV 176
#define SCLK_SPDIF_DIV 177
+#define SCLK_I2S_8CH 178
+
#define DCLK_VOP0 180
#define DCLK_VOP1 181