mfd: rk808: add rk805 support

[firefly-linux-kernel-4.4.55.git] / include / linux / mfd / rk808.h

diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index d1ee93ef6823e3d0ddd53e3c78be085902e8942a..59aa1eeb2845d17379a85f3b22b662a3015fde2f 100644 (file)
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -64,6 +64,16 @@ enum rk818_reg {
        RK818_ID_SWITCH,
 };
 
+enum rk805_reg {
+       RK805_ID_DCDC1,
+       RK805_ID_DCDC2,
+       RK805_ID_DCDC3,
+       RK805_ID_DCDC4,
+       RK805_ID_LDO1,
+       RK805_ID_LDO2,
+       RK805_ID_LDO3,
+};
+
 #define RK808_SECONDS_REG      0x00
 #define RK808_MINUTES_REG      0x01
 #define RK808_HOURS_REG                0x02
@@ -82,6 +92,8 @@ enum rk818_reg {
 #define RK808_RTC_INT_REG      0x12
 #define RK808_RTC_COMP_LSB_REG 0x13
 #define RK808_RTC_COMP_MSB_REG 0x14
+#define RK808_ID_MSB           0x17
+#define RK808_ID_LSB           0x18
 #define RK808_CLK32OUT_REG     0x20
 #define RK808_VB_MON_REG       0x21
 #define RK808_THERMAL_REG      0x22
@@ -441,6 +453,86 @@ enum rk818_reg {
 #define CHG_CVTLIM_ENABLE      BIT(6)
 #define DISCHG_ILIM_ENABLE     BIT(7)
 
+/* IRQ Definitions */
+#define RK805_IRQ_PWRON_RISE           0
+#define RK805_IRQ_VB_LOW               1
+#define RK805_IRQ_PWRON                        2
+#define RK805_IRQ_PWRON_LP             3
+#define RK805_IRQ_HOTDIE               4
+#define RK805_IRQ_RTC_ALARM            5
+#define RK805_IRQ_RTC_PERIOD           6
+#define RK805_IRQ_PWRON_FALL           7
+
+#define RK805_IRQ_PWRON_RISE_MSK       BIT(0)
+#define RK805_IRQ_VB_LOW_MSK           BIT(1)
+#define RK805_IRQ_PWRON_MSK            BIT(2)
+#define RK805_IRQ_PWRON_LP_MSK         BIT(3)
+#define RK805_IRQ_HOTDIE_MSK           BIT(4)
+#define RK805_IRQ_RTC_ALARM_MSK                BIT(5)
+#define RK805_IRQ_RTC_PERIOD_MSK       BIT(6)
+#define RK805_IRQ_PWRON_FALL_MSK       BIT(7)
+
+#define RK805_PWR_RISE_INT_STATUS      BIT(0)
+#define RK805_VB_LOW_INT_STATUS                BIT(1)
+#define RK805_PWRON_INT_STATUS         BIT(2)
+#define RK805_PWRON_LP_INT_STATUS      BIT(3)
+#define RK805_HOTDIE_INT_STATUS                BIT(4)
+#define RK805_ALARM_INT_STATUS         BIT(5)
+#define RK805_PERIOD_INT_STATUS                BIT(6)
+#define RK805_PWR_FALL_INT_STATUS      BIT(7)
+
+/*INTERRUPT REGISTER*/
+#define RK805_INT_STS_REG              0x4C
+#define RK805_INT_STS_MSK_REG          0x4D
+#define RK805_GPIO_IO_POL_REG          0x50
+#define RK805_OUT_REG                  0x52
+#define RK805_ON_SOURCE_REG            0xAE
+#define RK805_OFF_SOURCE_REG           0xAF
+
+/*POWER CHANNELS ENABLE REGISTER*/
+#define RK805_DCDC_EN_REG              0x23
+#define RK805_SLP_DCDC_EN_REG          0x25
+#define RK805_SLP_LDO_EN_REG           0x26
+#define RK805_LDO_EN_REG               0x27
+
+/*CONFIG REGISTER*/
+#define RK805_THERMAL_REG              0x22
+
+/*BUCK AND LDO CONFIG REGISTER*/
+#define RK805_BUCK_LDO_SLP_LP_EN_REG   0x2A
+#define RK805_BUCK1_CONFIG_REG         0x2E
+#define RK805_BUCK1_ON_VSEL_REG                0x2F
+#define RK805_BUCK1_SLP_VSEL_REG       0x30
+#define RK805_BUCK2_CONFIG_REG         0x32
+#define RK805_BUCK2_ON_VSEL_REG                0x33
+#define RK805_BUCK2_SLP_VSEL_REG       0x34
+#define RK805_BUCK3_CONFIG_REG         0x36
+#define RK805_BUCK4_CONFIG_REG         0x37
+#define RK805_BUCK4_ON_VSEL_REG                0x38
+#define RK805_BUCK4_SLP_VSEL_REG       0x39
+#define RK805_LDO1_ON_VSEL_REG         0x3B
+#define RK805_LDO1_SLP_VSEL_REG                0x3C
+#define RK805_LDO2_ON_VSEL_REG         0x3D
+#define RK805_LDO2_SLP_VSEL_REG                0x3E
+#define RK805_LDO3_ON_VSEL_REG         0x3F
+#define RK805_LDO3_SLP_VSEL_REG                0x40
+#define RK805_OUT_REG                  0x52
+#define RK805_ON_SOURCE_REG            0xAE
+#define RK805_OFF_SOURCE_REG           0xAF
+
+#define RK805_NUM_REGULATORS           7
+
+#define RK805_PWRON_FALL_RISE_INT_EN   0x0
+#define RK805_PWRON_FALL_RISE_INT_MSK  0x81
+
+#define TEMP115C                       0x0c
+#define TEMP_HOTDIE_MSK                        0x0c
+#define SLP_SD_MSK                     (0x3 << 2)
+#define SHUTDOWN_FUN                   (0x2 << 2)
+#define SLEEP_FUN                      (0x1 << 2)
+#define RK8XX_ID_MSK                   0xfff0
+#define FPWM_MODE                      BIT(7)
+
 enum {
        BUCK_ILMIN_50MA,
        BUCK_ILMIN_100MA,
@@ -467,5 +559,13 @@ struct rk808 {
        struct i2c_client *i2c;
        struct regmap_irq_chip_data *irq_data;
        struct regmap *regmap;
+       long variant;
 };
+
+enum {
+       RK805_ID = 0x8050,
+       RK808_ID = 0x0000,
+       RK818_ID = 0x8180,
+};
+
 #endif /* __LINUX_REGULATOR_rk808_H */