RK808_ID_SWITCH2,
};
+enum rk818_reg {
+ RK818_ID_DCDC1,
+ RK818_ID_DCDC2,
+ RK818_ID_DCDC3,
+ RK818_ID_DCDC4,
+ RK818_ID_LDO1,
+ RK818_ID_LDO2,
+ RK818_ID_LDO3,
+ RK818_ID_LDO4,
+ RK818_ID_LDO5,
+ RK818_ID_LDO6,
+ RK818_ID_LDO7,
+ RK818_ID_LDO8,
+ RK818_ID_LDO9,
+ RK818_ID_SWITCH,
+};
+
#define RK808_SECONDS_REG 0x00
#define RK808_MINUTES_REG 0x01
#define RK808_HOURS_REG 0x02
#define RK808_INT_STS_MSK_REG2 0x4f
#define RK808_IO_POL_REG 0x50
+#define RK818_VB_MON_REG 0x21
+#define RK818_THERMAL_REG 0x22
+#define RK818_DCDC_EN_REG 0x23
+#define RK818_LDO_EN_REG 0x24
+#define RK818_SLEEP_SET_OFF_REG1 0x25
+#define RK818_SLEEP_SET_OFF_REG2 0x26
+#define RK818_DCDC_UV_STS_REG 0x27
+#define RK818_DCDC_UV_ACT_REG 0x28
+#define RK818_LDO_UV_STS_REG 0x29
+#define RK818_LDO_UV_ACT_REG 0x2a
+#define RK818_DCDC_PG_REG 0x2b
+#define RK818_LDO_PG_REG 0x2c
+#define RK818_VOUT_MON_TDB_REG 0x2d
+#define RK818_BUCK1_CONFIG_REG 0x2e
+#define RK818_BUCK1_ON_VSEL_REG 0x2f
+#define RK818_BUCK1_SLP_VSEL_REG 0x30
+#define RK818_BUCK2_CONFIG_REG 0x32
+#define RK818_BUCK2_ON_VSEL_REG 0x33
+#define RK818_BUCK2_SLP_VSEL_REG 0x34
+#define RK818_BUCK3_CONFIG_REG 0x36
+#define RK818_BUCK4_CONFIG_REG 0x37
+#define RK818_BUCK4_ON_VSEL_REG 0x38
+#define RK818_BUCK4_SLP_VSEL_REG 0x39
+#define RK818_BOOST_CONFIG_REG 0x3a
+#define RK818_LDO1_ON_VSEL_REG 0x3b
+#define RK818_LDO1_SLP_VSEL_REG 0x3c
+#define RK818_LDO2_ON_VSEL_REG 0x3d
+#define RK818_LDO2_SLP_VSEL_REG 0x3e
+#define RK818_LDO3_ON_VSEL_REG 0x3f
+#define RK818_LDO3_SLP_VSEL_REG 0x40
+#define RK818_LDO4_ON_VSEL_REG 0x41
+#define RK818_LDO4_SLP_VSEL_REG 0x42
+#define RK818_LDO5_ON_VSEL_REG 0x43
+#define RK818_LDO5_SLP_VSEL_REG 0x44
+#define RK818_LDO6_ON_VSEL_REG 0x45
+#define RK818_LDO6_SLP_VSEL_REG 0x46
+#define RK818_LDO7_ON_VSEL_REG 0x47
+#define RK818_LDO7_SLP_VSEL_REG 0x48
+#define RK818_LDO8_ON_VSEL_REG 0x49
+#define RK818_LDO8_SLP_VSEL_REG 0x4a
+#define RK818_DEVCTRL_REG 0x4b
+#define RK818_INT_STS_REG1 0X4c
+#define RK818_INT_STS_MSK_REG1 0X4d
+#define RK818_INT_STS_REG2 0X4e
+#define RK818_INT_STS_MSK_REG2 0X4f
+#define RK818_IO_POL_REG 0X50
+#define RK818_OTP_VDD_EN_REG 0x51
+#define RK818_H5V_EN_REG 0x52
+#define RK818_SLEEP_SET_OFF_REG3 0x53
+#define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
+#define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
+#define RK818_BOOST_CTRL_REG 0x56
+#define RK818_DCDC_ILMAX_REG 0x90
+#define RK818_CHRG_COMP_REG 0x9a
+#define RK818_SUP_STS_REG 0xa0
+#define RK818_USB_CTRL_REG 0xa1
+
+#define RK818_SAVE_DATA19 0xF2
+#define RK818_NUM_REGULATORS 14
+
/* IRQ Definitions */
#define RK808_IRQ_VOUT_LO 0
#define RK808_IRQ_VB_LO 1
#define VOUT_LO_INT BIT(0)
#define CLK32KOUT2_EN BIT(0)
+#define H5V_EN_MASK BIT(0)
+#define H5V_EN_ENABLE BIT(0)
+#define REF_RDY_CTRL_MASK BIT(1)
+#define REF_RDY_CTRL_ENABLE BIT(1)
+
+/*RK818_DCDC_EN_REG*/
+#define BUCK1_EN_MASK BIT(0)
+#define BUCK2_EN_MASK BIT(1)
+#define BUCK3_EN_MASK BIT(2)
+#define BUCK4_EN_MASK BIT(3)
+#define BOOST_EN_MASK BIT(4)
+#define LDO9_EN_MASK BIT(5)
+#define SWITCH_EN_MASK BIT(6)
+#define OTG_EN_MASK BIT(7)
+
+#define BUCK1_EN_ENABLE BIT(0)
+#define BUCK2_EN_ENABLE BIT(1)
+#define BUCK3_EN_ENABLE BIT(2)
+#define BUCK4_EN_ENABLE BIT(3)
+#define BOOST_EN_ENABLE BIT(4)
+#define LDO9_EN_ENABLE BIT(5)
+#define SWITCH_EN_ENABLE BIT(6)
+#define OTG_EN_ENABLE BIT(7)
+
+/* IRQ Definitions */
+#define RK818_IRQ_VOUT_LO 0
+#define RK818_IRQ_VB_LO 1
+#define RK818_IRQ_PWRON 2
+#define RK818_IRQ_PWRON_LP 3
+#define RK818_IRQ_HOTDIE 4
+#define RK818_IRQ_RTC_ALARM 5
+#define RK818_IRQ_RTC_PERIOD 6
+#define RK818_IRQ_USB_OV 7
+#define RK818_IRQ_PLUG_IN 8
+#define RK818_IRQ_PLUG_OUT 9
+#define RK818_IRQ_CHG_OK 10
+#define RK818_IRQ_CHG_TE 11
+#define RK818_IRQ_CHG_TS1 12
+#define RK818_IRQ_TS2 13
+#define RK818_IRQ_CHG_CVTLIM 14
+#define RK818_IRQ_DISCHG_ILIM 15
+
+#define BUCK1_SLP_SET_MASK BIT(0)
+#define BUCK2_SLP_SET_MASK BIT(1)
+#define BUCK3_SLP_SET_MASK BIT(2)
+#define BUCK4_SLP_SET_MASK BIT(3)
+#define BOOST_SLP_SET_MASK BIT(4)
+#define LDO9_SLP_SET_MASK BIT(5)
+#define SWITCH_SLP_SET_MASK BIT(6)
+#define OTG_SLP_SET_MASK BIT(7)
+
+#define BUCK1_SLP_SET_OFF BIT(0)
+#define BUCK2_SLP_SET_OFF BIT(1)
+#define BUCK3_SLP_SET_OFF BIT(2)
+#define BUCK4_SLP_SET_OFF BIT(3)
+#define BOOST_SLP_SET_OFF BIT(4)
+#define LDO9_SLP_SET_OFF BIT(5)
+#define SWITCH_SLP_SET_OFF BIT(6)
+#define OTG_SLP_SET_OFF BIT(7)
+
+#define BUCK1_SLP_SET_ON BIT(0)
+#define BUCK2_SLP_SET_ON BIT(1)
+#define BUCK3_SLP_SET_ON BIT(2)
+#define BUCK4_SLP_SET_ON BIT(3)
+#define BOOST_SLP_SET_ON BIT(4)
+#define LDO9_SLP_SET_ON BIT(5)
+#define SWITCH_SLP_SET_ON BIT(6)
+#define OTG_SLP_SET_ON BIT(7)
+
+#define VOUT_LO_MASK BIT(0)
+#define VB_LO_MASK BIT(1)
+#define PWRON_MASK BIT(2)
+#define PWRON_LP_MASK BIT(3)
+#define HOTDIE_MASK BIT(4)
+#define RTC_ALARM_MASK BIT(5)
+#define RTC_PERIOD_MASK BIT(6)
+#define USB_OV_MASK BIT(7)
+
+#define VOUT_LO_DISABLE BIT(0)
+#define VB_LO_DISABLE BIT(1)
+#define PWRON_DISABLE BIT(2)
+#define PWRON_LP_DISABLE BIT(3)
+#define HOTDIE_DISABLE BIT(4)
+#define RTC_ALARM_DISABLE BIT(5)
+#define RTC_PERIOD_DISABLE BIT(6)
+#define USB_OV_INT_DISABLE BIT(7)
+
+#define VOUT_LO_ENABLE (0 << 0)
+#define VB_LO_ENABLE (0 << 1)
+#define PWRON_ENABLE (0 << 2)
+#define PWRON_LP_ENABLE (0 << 3)
+#define HOTDIE_ENABLE (0 << 4)
+#define RTC_ALARM_ENABLE (0 << 5)
+#define RTC_PERIOD_ENABLE (0 << 6)
+#define USB_OV_INT_ENABLE (0 << 7)
+
+#define PLUG_IN_MASK BIT(0)
+#define PLUG_OUT_MASK BIT(1)
+#define CHGOK_MASK BIT(2)
+#define CHGTE_MASK BIT(3)
+#define CHGTS1_MASK BIT(4)
+#define TS2_MASK BIT(5)
+#define CHG_CVTLIM_MASK BIT(6)
+#define DISCHG_ILIM_MASK BIT(7)
+
+#define PLUG_IN_DISABLE BIT(0)
+#define PLUG_OUT_DISABLE BIT(1)
+#define CHGOK_DISABLE BIT(2)
+#define CHGTE_DISABLE BIT(3)
+#define CHGTS1_DISABLE BIT(4)
+#define TS2_DISABLE BIT(5)
+#define CHG_CVTLIM_DISABLE BIT(6)
+#define DISCHG_ILIM_DISABLE BIT(7)
+
+#define PLUG_IN_ENABLE BIT(0)
+#define PLUG_OUT_ENABLE BIT(1)
+#define CHGOK_ENABLE BIT(2)
+#define CHGTE_ENABLE BIT(3)
+#define CHGTS1_ENABLE BIT(4)
+#define TS2_ENABLE BIT(5)
+#define CHG_CVTLIM_ENABLE BIT(6)
+#define DISCHG_ILIM_ENABLE BIT(7)
enum {
BUCK_ILMIN_50MA,
projects / firefly-linux-kernel-4.4.55.git / blobdiff