/* Write a value to a sequence register with a mask */
-static inline void svga_wseq_mask(u8 index, u8 data, u8 mask)
+static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
{
- vga_wseq(NULL, index, (data & mask) | (vga_rseq(NULL, index) & ~mask));
+ vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask));
}
/* Write a value to a CRT register with a mask */
-static inline void svga_wcrt_mask(u8 index, u8 data, u8 mask)
+static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
{
- vga_wcrt(NULL, index, (data & mask) | (vga_rcrt(NULL, index) & ~mask));
+ vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask));
}
static inline int svga_primary_device(struct pci_dev *dev)
void svga_set_default_gfx_regs(void __iomem *regbase);
void svga_set_default_atc_regs(void __iomem *regbase);
-void svga_set_default_seq_regs(void);
-void svga_set_default_crt_regs(void);
-void svga_set_textmode_vga_regs(void);
+void svga_set_default_seq_regs(void __iomem *regbase);
+void svga_set_default_crt_regs(void __iomem *regbase);
+void svga_set_textmode_vga_regs(void __iomem *regbase);
void svga_settile(struct fb_info *info, struct fb_tilemap *map);
void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area);
void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect);
void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
-void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor);
+void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor);
int svga_get_tilemax(struct fb_info *info);
void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
struct fb_var_screeninfo *var);
int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node);
-void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
+void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix);