MachineRegisterInfo &MRI;
MachineFrameInfo &MFI;
MachineConstantPool &MCP;
+ DebugLoc DL;
const TargetMachine &TM;
const TargetData &TD;
const TargetInstrInfo &TII;
const TargetLowering &TLI;
+ LLVMContext *Context;
public:
- /// startNewBlock - Set the current block, to which generated
- /// machine instructions will be appended, and clear the local
- /// CSE map.
+ /// startNewBlock - Set the current block to which generated machine
+ /// instructions will be appended, and clear the local CSE map.
///
void startNewBlock(MachineBasicBlock *mbb) {
setCurrentBlock(mbb);
LocalValueMap.clear();
}
- /// setCurrentBlock - Set the current block, to which generated
- /// machine instructions will be appended.
+ /// setCurrentBlock - Set the current block to which generated machine
+ /// instructions will be appended.
///
void setCurrentBlock(MachineBasicBlock *mbb) {
MBB = mbb;
}
+ /// setCurDebugLoc - Set the current debug location information, which is used
+ /// when creating a machine instruction.
+ ///
+ void setCurDebugLoc(DebugLoc dl) { DL = dl; }
+
+ /// getCurDebugLoc() - Return current debug location information.
+ DebugLoc getCurDebugLoc() const { return DL; }
+
/// SelectInstruction - Do "fast" instruction selection for the given
/// LLVM IR instruction, and append generated machine instructions to
/// the current block. Return true if selection was successful.
uint64_t Imm);
/// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
- /// from a specified index of a superregister.
- unsigned FastEmitInst_extractsubreg(unsigned Op0, uint32_t Idx);
+ /// from a specified index of a superregister to a specified type.
+ unsigned FastEmitInst_extractsubreg(MVT::SimpleValueType RetVT,
+ unsigned Op0, uint32_t Idx);
+
+ /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op
+ /// with all but the least significant bit set to zero.
+ unsigned FastEmitZExtFromI1(MVT::SimpleValueType VT,
+ unsigned Op);
/// FastEmitBranch - Emit an unconditional branch to the given block,
/// unless it is the immediate (fall-through) successor, and update
/// the CFG.
void FastEmitBranch(MachineBasicBlock *MBB);
- void UpdateValueMap(Value* I, unsigned Reg);
+ unsigned UpdateValueMap(Value* I, unsigned Reg);
unsigned createResultReg(const TargetRegisterClass *RC);