improve comments.

[oota-llvm.git] / include / llvm / CodeGen / FastISel.h

diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h
index 8c048480694afc4bdf06b3119c3d68b63009e9a9..857267c0112e388e061c30e7ff4a0f7bf8ad0a44 100644 (file)
--- a/include/llvm/CodeGen/FastISel.h
+++ b/include/llvm/CodeGen/FastISel.h
@@ -55,28 +55,37 @@ protected:
   MachineRegisterInfo &MRI;
   MachineFrameInfo &MFI;
   MachineConstantPool &MCP;
+  DebugLoc DL;
   const TargetMachine &TM;
   const TargetData &TD;
   const TargetInstrInfo &TII;
   const TargetLowering &TLI;
+  LLVMContext *Context;
 
 public:
-  /// startNewBlock - Set the current block, to which generated
-  /// machine instructions will be appended, and clear the local
-  /// CSE map.
+  /// startNewBlock - Set the current block to which generated machine
+  /// instructions will be appended, and clear the local CSE map.
   ///
   void startNewBlock(MachineBasicBlock *mbb) {
     setCurrentBlock(mbb);
     LocalValueMap.clear();
   }
 
-  /// setCurrentBlock - Set the current block, to which generated
-  /// machine instructions will be appended.
+  /// setCurrentBlock - Set the current block to which generated machine
+  /// instructions will be appended.
   ///
   void setCurrentBlock(MachineBasicBlock *mbb) {
     MBB = mbb;
   }
 
+  /// setCurDebugLoc - Set the current debug location information, which is used
+  /// when creating a machine instruction.
+  ///
+  void setCurDebugLoc(DebugLoc dl) { DL = dl; }
+
+  /// getCurDebugLoc() - Return current debug location information.
+  DebugLoc getCurDebugLoc() const { return DL; }
+
   /// SelectInstruction - Do "fast" instruction selection for the given
   /// LLVM IR instruction, and append generated machine instructions to
   /// the current block. Return true if selection was successful.
@@ -263,12 +272,17 @@ protected:
   unsigned FastEmitInst_extractsubreg(MVT::SimpleValueType RetVT,
                                       unsigned Op0, uint32_t Idx);
 
+  /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op
+  /// with all but the least significant bit set to zero.
+  unsigned FastEmitZExtFromI1(MVT::SimpleValueType VT,
+                              unsigned Op);
+
   /// FastEmitBranch - Emit an unconditional branch to the given block,
   /// unless it is the immediate (fall-through) successor, and update
   /// the CFG.
   void FastEmitBranch(MachineBasicBlock *MBB);
 
-  void UpdateValueMap(Value* I, unsigned Reg);
+  unsigned UpdateValueMap(Value* I, unsigned Reg);
 
   unsigned createResultReg(const TargetRegisterClass *RC);