Use instruction itinerary to determine what instructions are 'cheap'.

[oota-llvm.git] / include / llvm / CodeGen / LinkAllCodegenComponents.h

diff --git a/include/llvm/CodeGen/LinkAllCodegenComponents.h b/include/llvm/CodeGen/LinkAllCodegenComponents.h
index 4d2d0eec52dbc1d7f2d5b1dd97282ff014f9b19b..bc06d43b8fc57d5c2dd097a10e65d801f002273a 100644 (file)
--- a/include/llvm/CodeGen/LinkAllCodegenComponents.h
+++ b/include/llvm/CodeGen/LinkAllCodegenComponents.h
@@ -19,6 +19,7 @@
 #include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/GCs.h"
 #include "llvm/Target/TargetMachine.h"
+#include <cstdlib>
 
 namespace {
   struct ForceCodegenLinking {
@@ -32,9 +33,10 @@ namespace {
 
       (void) llvm::createDeadMachineInstructionElimPass();
 
-      (void) llvm::createLocalRegisterAllocator();
+      (void) llvm::createFastRegisterAllocator();
+      (void) llvm::createBasicRegisterAllocator();
       (void) llvm::createLinearScanRegisterAllocator();
-      (void) llvm::createPBQPRegisterAllocator();
+      (void) llvm::createDefaultPBQPRegisterAllocator();
 
       (void) llvm::createSimpleRegisterCoalescer();
       
@@ -43,6 +45,8 @@ namespace {
       
       (void) llvm::createBURRListDAGScheduler(NULL, llvm::CodeGenOpt::Default);
       (void) llvm::createTDRRListDAGScheduler(NULL, llvm::CodeGenOpt::Default);
+      (void) llvm::createSourceListDAGScheduler(NULL,llvm::CodeGenOpt::Default);
+      (void) llvm::createHybridListDAGScheduler(NULL,llvm::CodeGenOpt::Default);
       (void) llvm::createTDListDAGScheduler(NULL, llvm::CodeGenOpt::Default);
       (void) llvm::createFastDAGScheduler(NULL, llvm::CodeGenOpt::Default);
       (void) llvm::createDefaultScheduler(NULL, llvm::CodeGenOpt::Default);