#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "LiveInterval.h"
+#include "llvm/CodeGen/LiveInterval.h"
namespace llvm {
class LiveVariables;
class MRegisterInfo;
+ class TargetInstrInfo;
class VirtRegMap;
class LiveIntervals : public MachineFunctionPass {
MachineFunction* mf_;
const TargetMachine* tm_;
const MRegisterInfo* mri_;
+ const TargetInstrInfo* tii_;
LiveVariables* lv_;
typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
USE = 1,
DEF = 2,
STORE = 3,
- NUM = 4,
+ NUM = 4
};
};
virtual bool runOnMachineFunction(MachineFunction&);
/// print - Implement the dump method.
- virtual void print(std::ostream &O) const;
+ virtual void print(std::ostream &O, const Module* = 0) const;
private:
/// computeIntervals - compute live intervals
MachineBasicBlock::iterator mi,
LiveInterval& interval);
- /// handlePhysicalRegisterDef - update intervals for a
- /// physical register def
+ /// handlePhysicalRegisterDef - update intervals for a physical register
+ /// def. If the defining instruction is a move instruction, SrcReg will be
+ /// the input register, and DestReg will be the result. Note that Interval
+ /// may not match DestReg (it might be an alias instead).
+ ///
void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
MachineBasicBlock::iterator mi,
- LiveInterval& interval);
+ LiveInterval& interval,
+ unsigned SrcReg, unsigned DestReg,
+ bool isLiveIn = false);
/// Return true if the two specified registers belong to different
/// register classes. The registers may be either phys or virt regs.
bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
+ bool AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
+ LiveInterval &IntB,
+ unsigned CopyIdx);
+
bool overlapsAliases(const LiveInterval *lhs,
const LiveInterval *rhs) const;