#ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
#define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
+#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "LiveInterval.h"
+#include "llvm/CodeGen/LiveInterval.h"
namespace llvm {
class LiveVariables;
class MRegisterInfo;
+ class TargetInstrInfo;
class VirtRegMap;
class LiveIntervals : public MachineFunctionPass {
MachineFunction* mf_;
const TargetMachine* tm_;
const MRegisterInfo* mri_;
+ const TargetInstrInfo* tii_;
LiveVariables* lv_;
typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
Reg2IntervalMap r2iMap_;
- typedef std::map<unsigned, unsigned> Reg2RegMap;
+ typedef DenseMap<unsigned> Reg2RegMap;
Reg2RegMap r2rMap_;
std::vector<bool> allocatableRegs_;
USE = 1,
DEF = 2,
STORE = 3,
- NUM = 4,
+ NUM = 4
};
};
return getBaseIndex(index) + InstrSlots::STORE;
}
- // FIXME: this should really be a const_iterator
typedef Reg2IntervalMap::iterator iterator;
+ typedef Reg2IntervalMap::const_iterator const_iterator;
+ const_iterator begin() const { return r2iMap_.begin(); }
+ const_iterator end() const { return r2iMap_.end(); }
iterator begin() { return r2iMap_.begin(); }
iterator end() { return r2iMap_.end(); }
unsigned getNumIntervals() const { return r2iMap_.size(); }
/// runOnMachineFunction - pass entry point
virtual bool runOnMachineFunction(MachineFunction&);
+ /// print - Implement the dump method.
+ virtual void print(std::ostream &O, const Module* = 0) const;
+
private:
/// computeIntervals - compute live intervals
void computeIntervals();
MachineBasicBlock::iterator mi,
LiveInterval& interval);
- /// handlePhysicalRegisterDef - update intervals for a
- /// physical register def
+ /// handlePhysicalRegisterDef - update intervals for a physical register
+ /// def. If the defining instruction is a move instruction, SrcReg will be
+ /// the input register, and DestReg will be the result. Note that Interval
+ /// may not match DestReg (it might be an alias instead).
+ ///
void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
MachineBasicBlock::iterator mi,
- LiveInterval& interval);
+ LiveInterval& interval,
+ unsigned SrcReg, unsigned DestReg,
+ bool isLiveIn = false);
/// Return true if the two specified registers belong to different
/// register classes. The registers may be either phys or virt regs.
bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
+ bool AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
+ LiveInterval &IntB,
+ unsigned CopyIdx);
+
bool overlapsAliases(const LiveInterval *lhs,
const LiveInterval *rhs) const;
}
/// rep - returns the representative of this register
- unsigned rep(unsigned reg) {
- Reg2RegMap::iterator it = r2rMap_.find(reg);
- if (it != r2rMap_.end())
- return it->second = rep(it->second);
- return reg;
+ unsigned rep(unsigned Reg) {
+ unsigned Rep = r2rMap_[Reg];
+ if (Rep)
+ return r2rMap_[Reg] = rep(Rep);
+ return Reg;
}
void printRegName(unsigned reg) const;