Implement "general dynamic", "initial exec" and "local exec" TLS models for

[oota-llvm.git] / include / llvm / CodeGen / LiveIntervalAnalysis.h

diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 69103a31f15a516c75bd7e72cb9c894b1caff89b..29d053910a0c1f37cb0e281e8becbe22b7f79e7a 100644 (file)
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -23,6 +23,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/IndexedMap.h"
 
 namespace llvm {
@@ -30,6 +31,7 @@ namespace llvm {
   class LiveVariables;
   class MRegisterInfo;
   class TargetInstrInfo;
+  class TargetRegisterClass;
   class VirtRegMap;
 
   class LiveIntervals : public MachineFunctionPass {
@@ -56,6 +58,11 @@ namespace llvm {
     Reg2RegMap r2rMap_;
 
     BitVector allocatableRegs_;
+    DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs_;
+
+    /// JoinedLIs - Keep track which register intervals have been coalesced
+    /// with other intervals.
+    BitVector JoinedLIs;
 
   public:
     struct CopyRec {
@@ -119,8 +126,7 @@ namespace llvm {
     }
 
     bool hasInterval(unsigned reg) const {
-      Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
-      return I != r2iMap_.end();
+      return r2iMap_.count(reg);
     }
 
     /// getMBBStartIdx - Return the base index of the first instruction in the
@@ -172,6 +178,12 @@ namespace llvm {
     }
 
   private:
+    /// isRemoved - returns true if the specified machine instr has been
+    /// removed.
+    bool isRemoved(MachineInstr* instr) const {
+      return !mi2iMap_.count(instr);
+    }
+
     /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
     /// deleted.
     void RemoveMachineInstrFromMaps(MachineInstr *MI) {
@@ -193,7 +205,7 @@ namespace llvm {
     /// CopyCoallesceInMBB - Coallsece copies in the specified MBB, putting
     /// copies that cannot yet be coallesced into the "TryAgain" list.
     void CopyCoallesceInMBB(MachineBasicBlock *MBB,
-                            std::vector<CopyRec> &TryAgain);
+                         std::vector<CopyRec> *TryAgain, bool PhysOnly = false);
 
     /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
     /// which are the src/dst of the copy instruction CopyMI.  This returns true
@@ -201,7 +213,8 @@ namespace llvm {
     /// to coallesce these this copy, due to register constraints.  It returns
     /// false if it is not currently possible to coallesce this interval, but
     /// it may be possible if other things get coallesced.
-    bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg);
+    bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg,
+                  bool PhysOnly = false);
     
     /// JoinIntervals - Attempt to join these two intervals.  On failure, this
     /// returns false.  Otherwise, if one of the intervals being joined is a
@@ -252,9 +265,23 @@ namespace llvm {
     bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
                               MachineInstr *CopyMI);
 
-    /// hasRegisterUse - Returns true if there is any use of the specific
-    /// reg between indexes Start and End.
-    bool hasRegisterUse(unsigned Reg, unsigned Start, unsigned End);
+    /// lastRegisterUse - Returns the last use of the specific register between
+    /// cycles Start and End. It also returns the use operand by reference. It
+    /// returns NULL if there are no uses.
+    MachineInstr *lastRegisterUse(unsigned Reg, unsigned Start, unsigned End,
+                                  MachineOperand *&MOU);
+
+    /// findDefOperand - Returns the MachineOperand that is a def of the specific
+    /// register. It returns NULL if the def is not found.
+    MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg);
+
+    /// unsetRegisterKill - Unset IsKill property of all uses of the specific
+    /// register of the specific instruction.
+    void unsetRegisterKill(MachineInstr *MI, unsigned Reg);
+
+    /// hasRegisterDef - True if the instruction defines the specific register.
+    ///
+    bool hasRegisterDef(MachineInstr *MI, unsigned Reg);
 
     static LiveInterval createInterval(unsigned Reg);