typedef DenseMap<unsigned, LiveInterval*> Reg2IntervalMap;
Reg2IntervalMap r2iMap_;
+ DenseMap<MachineBasicBlock*, unsigned> terminatorGaps;
+
BitVector allocatableRegs_;
std::vector<MachineInstr*> ClonedMIs;
+ typedef LiveInterval::InstrSlots InstrSlots;
+
public:
static char ID; // Pass identification, replacement for typeid
LiveIntervals() : MachineFunctionPass(&ID) {}
- struct InstrSlots {
- enum {
- LOAD = 0,
- USE = 1,
- DEF = 2,
- STORE = 3,
- NUM = 4
- };
- };
-
static unsigned getBaseIndex(unsigned index) {
return index - (index % InstrSlots::NUM);
}
return getInstructionFromIndex(Index) == 0;
}
+ /// hasGapAfterInstr - Return true if the successive instruction slot,
+ /// i.e. Index + InstrSlots::Num, is not occupied.
+ bool hasGapAfterInstr(unsigned Index) {
+ Index = getBaseIndex(Index + InstrSlots::NUM);
+ return getInstructionFromIndex(Index) == 0;
+ }
+
/// findGapBeforeInstr - Find an empty instruction slot before the
/// specified index. If "Furthest" is true, find one that's furthest
/// away from the index (but before any index that's occupied).
I = r2iMap_.insert(std::make_pair(reg, createInterval(reg))).first;
return *I->second;
}
+
+ /// dupInterval - Duplicate a live interval. The caller is responsible for
+ /// managing the allocated memory.
+ LiveInterval *dupInterval(LiveInterval *li);
/// addLiveRangeToEndOfBlock - Given a register and an instruction,
/// adds a live range from that instruction to the end of its MBB.
r2iMap_.erase(I);
}
- /// isRemoved - returns true if the specified machine instr has been
- /// removed.
- bool isRemoved(MachineInstr* instr) const {
+ /// isNotInMIMap - returns true if the specified machine instr has been
+ /// removed or was never entered in the map.
+ bool isNotInMIMap(MachineInstr* instr) const {
return !mi2iMap_.count(instr);
}
std::vector<LiveInterval*>
addIntervalsForSpills(const LiveInterval& i,
SmallVectorImpl<LiveInterval*> &SpillIs,
- const MachineLoopInfo *loopInfo, VirtRegMap& vrm,
- float &SSWeight);
+ const MachineLoopInfo *loopInfo, VirtRegMap& vrm);
/// addIntervalsForSpillsFast - Quickly create new intervals for spilled
/// defs / uses without remat or splitting.
std::vector<LiveInterval*>
addIntervalsForSpillsFast(const LiveInterval &li,
- const MachineLoopInfo *loopInfo,
- VirtRegMap &vrm, float& SSWeight);
+ const MachineLoopInfo *loopInfo, VirtRegMap &vrm);
/// spillPhysRegAroundRegDefsUses - Spill the specified physical register
- /// around all defs and uses of the specified interval.
- void spillPhysRegAroundRegDefsUses(const LiveInterval &li,
+ /// around all defs and uses of the specified interval. Return true if it
+ /// was able to cut its interval.
+ bool spillPhysRegAroundRegDefsUses(const LiveInterval &li,
unsigned PhysReg, VirtRegMap &vrm);
/// isReMaterializable - Returns true if every definition of MI of every
unsigned getNumConflictsWithPhysReg(const LiveInterval &li,
unsigned PhysReg) const;
+ /// processImplicitDefs - Process IMPLICIT_DEF instructions. Add isUndef
+ /// marker to implicit_def defs and their uses.
+ void processImplicitDefs();
+
/// computeNumbering - Compute the index numbering.
void computeNumbering();
+ /// scaleNumbering - Rescale interval numbers to introduce gaps for new
+ /// instructions
+ void scaleNumbering(int factor);
+
/// intervalIsInOneMBB - Returns true if the specified interval is entirely
/// within a single basic block.
bool intervalIsInOneMBB(const LiveInterval &li) const;
SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse,
DenseMap<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs, float &SSWeight);
+ std::vector<LiveInterval*> &NewLIs);
void rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
LiveInterval::Ranges::const_iterator &I,
MachineInstr *OrigDefMI, MachineInstr *DefMI, unsigned Slot, int LdSlot,
BitVector &RestoreMBBs,
DenseMap<unsigned,std::vector<SRInfo> > &RestoreIdxes,
DenseMap<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs, float &SSWeight);
+ std::vector<LiveInterval*> &NewLIs);
static LiveInterval* createInterval(unsigned Reg);