Add a BitVector class.

[oota-llvm.git] / include / llvm / CodeGen / LiveIntervalAnalysis.h

diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 21c883318da7409ac044bb28db6e1a5673862371..70c189df7806800a6655feb5c9797170194a1642 100644 (file)
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -20,9 +20,9 @@
 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
 
-#include "llvm/ADT/DenseMap.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/LiveInterval.h"
+#include "llvm/ADT/IndexedMap.h"
 
 namespace llvm {
 
@@ -38,6 +38,10 @@ namespace llvm {
     const TargetInstrInfo* tii_;
     LiveVariables* lv_;
 
+    /// MBB2IdxMap - The index of the first instruction in the specified basic
+    /// block.
+    std::vector<unsigned> MBB2IdxMap;
+    
     typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
     Mi2IndexMap mi2iMap_;
 
@@ -47,7 +51,7 @@ namespace llvm {
     typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
     Reg2IntervalMap r2iMap_;
 
-    typedef DenseMap<unsigned> Reg2RegMap;
+    typedef IndexedMap<unsigned> Reg2RegMap;
     Reg2RegMap r2rMap_;
 
     std::vector<bool> allocatableRegs_;
@@ -113,6 +117,17 @@ namespace llvm {
       return I->second;
     }
 
+    /// getMBBStartIdx - Return the base index of the first instruction in the
+    /// specified MachineBasicBlock.
+    unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
+      return getMBBStartIdx(MBB->getNumber());
+    }
+    
+    unsigned getMBBStartIdx(unsigned MBBNo) const {
+      assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
+      return MBB2IdxMap[MBBNo];
+    }
+
     /// getInstructionIndex - returns the base index of instr
     unsigned getInstructionIndex(MachineInstr* instr) const {
       Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
@@ -128,11 +143,16 @@ namespace llvm {
              "index does not correspond to an instruction");
       return i2miMap_[index];
     }
-
+    
     std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
                                                      VirtRegMap& vrm,
                                                      int slot);
 
+    /// CreateNewLiveInterval - Create a new live interval with the given live
+    /// ranges. The new live interval will have an infinite spill weight.
+    LiveInterval &CreateNewLiveInterval(const LiveInterval *LI,
+                                        const std::vector<LiveRange> &LRs);
+
     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
     virtual void releaseMemory();
 
@@ -141,6 +161,9 @@ namespace llvm {
 
     /// print - Implement the dump method.
     virtual void print(std::ostream &O, const Module* = 0) const;
+    void print(std::ostream *O, const Module* M = 0) const {
+      if (O) print(*O, M);
+    }
 
   private:
     /// RemoveMachineInstrFromMaps - This marks the specified machine instr as
@@ -155,7 +178,7 @@ namespace llvm {
       }
     }
       
-    /// computeIntervals - compute live intervals
+    /// computeIntervals - Compute live intervals.
     void computeIntervals();
 
     /// joinIntervals - join compatible live intervals
@@ -190,20 +213,22 @@ namespace llvm {
     /// handleRegisterDef - update intervals for a register def
     /// (calls handlePhysicalRegisterDef and
     /// handleVirtualRegisterDef)
-    void handleRegisterDef(MachineBasicBlock* mbb,
-                           MachineBasicBlock::iterator mi,
+    void handleRegisterDef(MachineBasicBlock *MBB,
+                           MachineBasicBlock::iterator MI, unsigned MIIdx,
                            unsigned reg);
 
     /// handleVirtualRegisterDef - update intervals for a virtual
     /// register def
-    void handleVirtualRegisterDef(MachineBasicBlock* mbb,
-                                  MachineBasicBlock::iterator mi,
+    void handleVirtualRegisterDef(MachineBasicBlock *MBB,
+                                  MachineBasicBlock::iterator MI,
+                                  unsigned MIIdx,
                                   LiveInterval& interval);
 
     /// handlePhysicalRegisterDef - update intervals for a physical register
     /// def.
     void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
                                    MachineBasicBlock::iterator mi,
+                                   unsigned MIIdx,
                                    LiveInterval &interval,
                                    unsigned SrcReg);