// This file implements the LiveInterval analysis pass. Given some numbering of
// each the machine instructions (in this implemention depth-first order) an
// interval [i, j) is said to be a live interval for register v if there is no
-// instruction with number j' > j such that v is live at j' abd there is no
+// instruction with number j' > j such that v is live at j' and there is no
// instruction with number i' < i such that v is live at i'. In this
// implementation intervals can have holes, i.e. an interval might look like
// [1,20), [50,65), [1000,1001).
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Allocator.h"
#include <cmath>
+#include <map>
namespace llvm {
const_iterator end() const { return r2iMap_.end(); }
iterator begin() { return r2iMap_.begin(); }
iterator end() { return r2iMap_.end(); }
- unsigned getNumIntervals() const { return r2iMap_.size(); }
+ unsigned getNumIntervals() const { return (unsigned)r2iMap_.size(); }
LiveInterval &getInterval(unsigned reg) {
Reg2IntervalMap::iterator I = r2iMap_.find(reg);
return MBB2IdxMap[MBBNo].second;
}
+ /// getIntervalSize - get the size of an interval in "units,"
+ /// where every function is composed of one thousand units. This
+ /// measure scales properly with empty index slots in the function.
+ unsigned getScaledIntervalSize(LiveInterval& I) {
+ // Factor of 250 comes from 1000 units per function divided
+ // by four slots per instruction.
+ return (250 * I.getSize()) / i2miMap_.size();
+ }
+
/// getMBBFromIndex - given an index in any instruction of an
/// MBB return a pointer the MBB
MachineBasicBlock* getMBBFromIndex(unsigned index) const {
std::vector<IdxMBBPair>::const_iterator I =
- std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), index);
+ std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), index);
// Take the pair containing the index
std::vector<IdxMBBPair>::const_iterator J =
- ((I != Idx2MBBMap.end() && I->first > index) ||
- (I == Idx2MBBMap.end() && Idx2MBBMap.size()>0)) ? (I-1): I;
+ ((I != Idx2MBBMap.end() && I->first > index) ||
+ (I == Idx2MBBMap.end() && Idx2MBBMap.size()>0)) ? (I-1): I;
assert(J != Idx2MBBMap.end() && J->first < index+1 &&
- index <= getMBBEndIdx(J->second) &&
- "index does not correspond to an MBB");
+ index <= getMBBEndIdx(J->second) &&
+ "index does not correspond to an MBB");
return J->second;
}
I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
return I->second;
}
+
+ /// addLiveRangeToEndOfBlock - Given a register and an instruction,
+ /// adds a live range from that instruction to the end of its MBB.
+ LiveRange addLiveRangeToEndOfBlock(unsigned reg,
+ MachineInstr* startInst);
// Interval removal
}
/// addIntervalsForSpills - Create new intervals for spilled defs / uses of
- /// the given interval.
+ /// the given interval. FIXME: It also returns the weight of the spill slot
+ /// (if any is created) by reference. This is temporary.
std::vector<LiveInterval*>
addIntervalsForSpills(const LiveInterval& i,
- const MachineLoopInfo *loopInfo, VirtRegMap& vrm);
+ const MachineLoopInfo *loopInfo, VirtRegMap& vrm,
+ float &SSWeight);
+
+ /// spillPhysRegAroundRegDefsUses - Spill the specified physical register
+ /// around all defs and uses of the specified interval.
+ void spillPhysRegAroundRegDefsUses(const LiveInterval &li,
+ unsigned PhysReg, VirtRegMap &vrm);
/// isReMaterializable - Returns true if every definition of MI of every
/// val# of the specified interval is re-materializable. Also returns true
/// by reference if all of the defs are load instructions.
bool isReMaterializable(const LiveInterval &li, bool &isLoad);
+ /// getRepresentativeReg - Find the largest super register of the specified
+ /// physical register.
+ unsigned getRepresentativeReg(unsigned Reg) const;
+
+ /// getNumConflictsWithPhysReg - Return the number of uses and defs of the
+ /// specified interval that conflicts with the specified physical register.
+ unsigned getNumConflictsWithPhysReg(const LiveInterval &li,
+ unsigned PhysReg) const;
+
+ /// computeNumbering - Compute the index numbering.
+ void computeNumbering();
+
private:
/// computeIntervals - Compute live intervals.
void computeIntervals();
/// canFoldMemoryOperand - Return true if the specified load / store
/// folding is possible.
bool canFoldMemoryOperand(MachineInstr *MI,
- SmallVector<unsigned, 2> &Ops) const;
- bool canFoldMemoryOperand(MachineInstr *MI, unsigned Reg) const;
+ SmallVector<unsigned, 2> &Ops,
+ bool ReMatLoadSS) const;
/// anyKillInMBBAfterIdx - Returns true if there is a kill of the specified
/// VNInfo that's after the specified index but is within the basic block.
/// within a single basic block.
bool intervalIsInOneMBB(const LiveInterval &li) const;
+ /// hasAllocatableSuperReg - Return true if the specified physical register
+ /// has any super register that's allocatable.
+ bool hasAllocatableSuperReg(unsigned Reg) const;
+
/// SRInfo - Spill / restore info.
struct SRInfo {
int index;
BitVector &RestoreMBBs,
std::map<unsigned,std::vector<SRInfo> >&RestoreIdxes);
+ /// handleSpilledImpDefs - Remove IMPLICIT_DEF instructions which are being
+ /// spilled and create empty intervals for their uses.
+ void handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vrm,
+ const TargetRegisterClass* rc,
+ std::vector<LiveInterval*> &NewLIs);
+
/// rewriteImplicitOps - Rewrite implicit use operands of MI (i.e. uses of
/// interval on to-be re-materialized operands of MI) with new register.
void rewriteImplicitOps(const LiveInterval &li,
SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse,
std::map<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs);
+ std::vector<LiveInterval*> &NewLIs, float &SSWeight);
void rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
LiveInterval::Ranges::const_iterator &I,
MachineInstr *OrigDefMI, MachineInstr *DefMI, unsigned Slot, int LdSlot,
BitVector &RestoreMBBs,
std::map<unsigned,std::vector<SRInfo> > &RestoreIdxes,
std::map<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs);
+ std::vector<LiveInterval*> &NewLIs, float &SSWeight);
static LiveInterval createInterval(unsigned Reg);
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