Rename some GC classes so that their roll will hopefully be clearer.

[oota-llvm.git] / include / llvm / CodeGen / LiveIntervalAnalysis.h

diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 039aac543b3ec0f84a4cb52a7a39b51cc1510a52..a94840e89621a39bdb4a9f16ddd2adbca854769f 100644 (file)
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -28,7 +28,6 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Support/Allocator.h"
 #include <cmath>
-#include <map>
 
 namespace llvm {
 
@@ -55,6 +54,20 @@ namespace llvm {
       return LHS.first < RHS.first;
     }
   };
+  
+  // Provide DenseMapInfo for unsigned.
+  template<>
+  struct DenseMapInfo<unsigned> {
+    static inline unsigned getEmptyKey() { return (unsigned)-1; }
+    static inline unsigned getTombstoneKey() { return (unsigned)-2; }
+    static unsigned getHashValue(const unsigned Val) {
+      return Val * 37;
+    }
+    static bool isEqual(const unsigned LHS, const unsigned RHS) {
+      return LHS == RHS;
+    }
+    static bool isPod() { return true; }
+  };
 
   class LiveIntervals : public MachineFunctionPass {
     MachineFunction* mf_;
@@ -80,13 +93,13 @@ namespace llvm {
     /// FunctionSize - The number of instructions present in the function
     uint64_t FunctionSize;
 
-    typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
+    typedef DenseMap<MachineInstr*, unsigned> Mi2IndexMap;
     Mi2IndexMap mi2iMap_;
 
     typedef std::vector<MachineInstr*> Index2MiMap;
     Index2MiMap i2miMap_;
 
-    typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
+    typedef DenseMap<unsigned, LiveInterval*> Reg2IntervalMap;
     Reg2IntervalMap r2iMap_;
 
     BitVector allocatableRegs_;
@@ -141,13 +154,13 @@ namespace llvm {
     LiveInterval &getInterval(unsigned reg) {
       Reg2IntervalMap::iterator I = r2iMap_.find(reg);
       assert(I != r2iMap_.end() && "Interval does not exist for register");
-      return I->second;
+      return *I->second;
     }
 
     const LiveInterval &getInterval(unsigned reg) const {
       Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
       assert(I != r2iMap_.end() && "Interval does not exist for register");
-      return I->second;
+      return *I->second;
     }
 
     bool hasInterval(unsigned reg) const {
@@ -236,8 +249,8 @@ namespace llvm {
     LiveInterval &getOrCreateInterval(unsigned reg) {
       Reg2IntervalMap::iterator I = r2iMap_.find(reg);
       if (I == r2iMap_.end())
-        I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
-      return I->second;
+        I = r2iMap_.insert(std::make_pair(reg, createInterval(reg))).first;
+      return *I->second;
     }
     
     /// addLiveRangeToEndOfBlock - Given a register and an instruction,
@@ -248,7 +261,9 @@ namespace llvm {
     // Interval removal
 
     void removeInterval(unsigned Reg) {
-      r2iMap_.erase(Reg);
+      DenseMap<unsigned, LiveInterval*>::iterator I = r2iMap_.find(Reg);
+      delete I->second;
+      r2iMap_.erase(I);
     }
 
     /// isRemoved - returns true if the specified machine instr has been
@@ -418,10 +433,10 @@ namespace llvm {
 
     bool alsoFoldARestore(int Id, int index, unsigned vr,
                           BitVector &RestoreMBBs,
-                          std::map<unsigned,std::vector<SRInfo> >&RestoreIdxes);
+                          DenseMap<unsigned,std::vector<SRInfo> >&RestoreIdxes);
     void eraseRestoreInfo(int Id, int index, unsigned vr,
                           BitVector &RestoreMBBs,
-                          std::map<unsigned,std::vector<SRInfo> >&RestoreIdxes);
+                          DenseMap<unsigned,std::vector<SRInfo> >&RestoreIdxes);
 
     /// handleSpilledImpDefs - Remove IMPLICIT_DEF instructions which are being
     /// spilled and create empty intervals for their uses.
@@ -444,7 +459,7 @@ namespace llvm {
         VirtRegMap &vrm, const TargetRegisterClass* rc,
         SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
         unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse,
-        std::map<unsigned,unsigned> &MBBVRegsMap,
+        DenseMap<unsigned,unsigned> &MBBVRegsMap,
         std::vector<LiveInterval*> &NewLIs, float &SSWeight);
     void rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
         LiveInterval::Ranges::const_iterator &I,
@@ -453,13 +468,13 @@ namespace llvm {
         VirtRegMap &vrm, const TargetRegisterClass* rc,
         SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
         BitVector &SpillMBBs,
-        std::map<unsigned,std::vector<SRInfo> > &SpillIdxes,
+        DenseMap<unsigned,std::vector<SRInfo> > &SpillIdxes,
         BitVector &RestoreMBBs,
-        std::map<unsigned,std::vector<SRInfo> > &RestoreIdxes,
-        std::map<unsigned,unsigned> &MBBVRegsMap,
+        DenseMap<unsigned,std::vector<SRInfo> > &RestoreIdxes,
+        DenseMap<unsigned,unsigned> &MBBVRegsMap,
         std::vector<LiveInterval*> &NewLIs, float &SSWeight);
 
-    static LiveInterval createInterval(unsigned Reg);
+    static LiveInterval* createInterval(unsigned Reg);
 
     void printRegName(unsigned reg) const;
   };