Add DebugLoc field and simple accessors.

[oota-llvm.git] / include / llvm / CodeGen / LiveIntervalAnalysis.h

diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 4cde906475265678292d9927a286f0527f782839..b87214f5e2c5b61520b0ba985a0bcc234f1f89c3 100644 (file)
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -28,7 +28,6 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Support/Allocator.h"
 #include <cmath>
-#include <map>
 
 namespace llvm {
 
@@ -220,15 +219,59 @@ namespace llvm {
       return i2miMap_[index];
     }
 
+    /// hasGapBeforeInstr - Return true if the previous instruction slot,
+    /// i.e. Index - InstrSlots::NUM, is not occupied.
+    bool hasGapBeforeInstr(unsigned Index) {
+      Index = getBaseIndex(Index - InstrSlots::NUM);
+      return getInstructionFromIndex(Index) == 0;
+    }
+
+    /// findGapBeforeInstr - Find an empty instruction slot before the
+    /// specified index. If "Furthest" is true, find one that's furthest
+    /// away from the index (but before any index that's occupied).
+    unsigned findGapBeforeInstr(unsigned Index, bool Furthest = false) {
+      Index = getBaseIndex(Index - InstrSlots::NUM);
+      if (getInstructionFromIndex(Index))
+        return 0;  // No gap!
+      if (!Furthest)
+        return Index;
+      unsigned PrevIndex = getBaseIndex(Index - InstrSlots::NUM);
+      while (getInstructionFromIndex(Index)) {
+        Index = PrevIndex;
+        PrevIndex = getBaseIndex(Index - InstrSlots::NUM);
+      }
+      return Index;
+    }
+
+    /// InsertMachineInstrInMaps - Insert the specified machine instruction
+    /// into the instruction index map at the given index.
+    void InsertMachineInstrInMaps(MachineInstr *MI, unsigned Index) {
+      i2miMap_[Index / InstrSlots::NUM] = MI;
+      Mi2IndexMap::iterator it = mi2iMap_.find(MI);
+      assert(it == mi2iMap_.end() && "Already in map!");
+      mi2iMap_[MI] = Index;
+    }
+
     /// conflictsWithPhysRegDef - Returns true if the specified register
     /// is defined during the duration of the specified interval.
     bool conflictsWithPhysRegDef(const LiveInterval &li, VirtRegMap &vrm,
                                  unsigned reg);
 
+    /// conflictsWithPhysRegRef - Similar to conflictsWithPhysRegRef except
+    /// it can check use as well.
+    bool conflictsWithPhysRegRef(LiveInterval &li, unsigned Reg,
+                                 bool CheckUse,
+                                 SmallPtrSet<MachineInstr*,32> &JoinedCopies);
+
     /// findLiveInMBBs - Given a live range, if the value of the range
     /// is live in any MBB returns true as well as the list of basic blocks
     /// in which the value is live.
-    bool findLiveInMBBs(const LiveRange &LR,
+    bool findLiveInMBBs(unsigned Start, unsigned End,
+                        SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
+
+    /// findReachableMBBs - Return a list MBB that can be reached via any
+    /// branch or fallthroughs. Return true if the list is not empty.
+    bool findReachableMBBs(unsigned Start, unsigned End,
                         SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
 
     // Interval creation
@@ -331,6 +374,11 @@ namespace llvm {
                             SmallVectorImpl<LiveInterval*> &SpillIs,
                             bool &isLoad);
 
+    /// isReMaterializable - Returns true if the definition MI of the specified
+    /// val# of the specified interval is re-materializable.
+    bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo,
+                            MachineInstr *MI);
+
     /// getRepresentativeReg - Find the largest super register of the specified
     /// physical register.
     unsigned getRepresentativeReg(unsigned Reg) const;
@@ -343,6 +391,10 @@ namespace llvm {
     /// computeNumbering - Compute the index numbering.
     void computeNumbering();
 
+    /// intervalIsInOneMBB - Returns true if the specified interval is entirely
+    /// within a single basic block.
+    bool intervalIsInOneMBB(const LiveInterval &li) const;
+
   private:      
     /// computeIntervals - Compute live intervals.
     void computeIntervals();
@@ -414,10 +466,6 @@ namespace llvm {
     bool anyKillInMBBAfterIdx(const LiveInterval &li, const VNInfo *VNI,
                               MachineBasicBlock *MBB, unsigned Idx) const;
 
-    /// intervalIsInOneMBB - Returns true if the specified interval is entirely
-    /// within a single basic block.
-    bool intervalIsInOneMBB(const LiveInterval &li) const;
-
     /// hasAllocatableSuperReg - Return true if the specified physical register
     /// has any super register that's allocatable.
     bool hasAllocatableSuperReg(unsigned Reg) const;