Add DebugLoc to the getNode() methods.

[oota-llvm.git] / include / llvm / CodeGen / LiveIntervalAnalysis.h

diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 1244368b60162b3445168ce12db6f68222ddadea..b87214f5e2c5b61520b0ba985a0bcc234f1f89c3 100644 (file)
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -257,10 +257,21 @@ namespace llvm {
     bool conflictsWithPhysRegDef(const LiveInterval &li, VirtRegMap &vrm,
                                  unsigned reg);
 
+    /// conflictsWithPhysRegRef - Similar to conflictsWithPhysRegRef except
+    /// it can check use as well.
+    bool conflictsWithPhysRegRef(LiveInterval &li, unsigned Reg,
+                                 bool CheckUse,
+                                 SmallPtrSet<MachineInstr*,32> &JoinedCopies);
+
     /// findLiveInMBBs - Given a live range, if the value of the range
     /// is live in any MBB returns true as well as the list of basic blocks
     /// in which the value is live.
-    bool findLiveInMBBs(const LiveRange &LR,
+    bool findLiveInMBBs(unsigned Start, unsigned End,
+                        SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
+
+    /// findReachableMBBs - Return a list MBB that can be reached via any
+    /// branch or fallthroughs. Return true if the list is not empty.
+    bool findReachableMBBs(unsigned Start, unsigned End,
                         SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
 
     // Interval creation
@@ -363,6 +374,11 @@ namespace llvm {
                             SmallVectorImpl<LiveInterval*> &SpillIs,
                             bool &isLoad);
 
+    /// isReMaterializable - Returns true if the definition MI of the specified
+    /// val# of the specified interval is re-materializable.
+    bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo,
+                            MachineInstr *MI);
+
     /// getRepresentativeReg - Find the largest super register of the specified
     /// physical register.
     unsigned getRepresentativeReg(unsigned Reg) const;
@@ -375,6 +391,10 @@ namespace llvm {
     /// computeNumbering - Compute the index numbering.
     void computeNumbering();
 
+    /// intervalIsInOneMBB - Returns true if the specified interval is entirely
+    /// within a single basic block.
+    bool intervalIsInOneMBB(const LiveInterval &li) const;
+
   private:      
     /// computeIntervals - Compute live intervals.
     void computeIntervals();
@@ -446,10 +466,6 @@ namespace llvm {
     bool anyKillInMBBAfterIdx(const LiveInterval &li, const VNInfo *VNI,
                               MachineBasicBlock *MBB, unsigned Idx) const;
 
-    /// intervalIsInOneMBB - Returns true if the specified interval is entirely
-    /// within a single basic block.
-    bool intervalIsInOneMBB(const LiveInterval &li) const;
-
     /// hasAllocatableSuperReg - Return true if the specified physical register
     /// has any super register that's allocatable.
     bool hasAllocatableSuperReg(unsigned Reg) const;