#ifndef LLVM_CODEGEN_MACHINEINSTR_H
#define LLVM_CODEGEN_MACHINEINSTR_H
-#include "Support/Annotation.h"
-#include "Support/iterator"
+#include "llvm/ADT/iterator"
#include <vector>
+#include <cassert>
namespace llvm {
class TargetMachine;
class GlobalValue;
-typedef int MachineOpCode;
+template <typename T> struct ilist_traits;
+template <typename T> struct ilist;
-//===----------------------------------------------------------------------===//
-/// Special flags on instructions that modify the opcode.
-/// These flags are unused for now, but having them enforces that some
-/// changes will be needed if they are used.
-///
-enum MachineOpCodeFlags {
- AnnulFlag, /// 1 if annul bit is set on a branch
- PredTakenFlag, /// 1 if branch should be predicted taken
- PredNotTakenFlag /// 1 if branch should be predicted not taken
-};
-
-//===----------------------------------------------------------------------===//
-/// MOTy - MachineOperandType - This namespace contains an enum that describes
-/// how the machine operand is used by the instruction: is it read, defined, or
-/// both? Note that the MachineInstr/Operator class currently uses bool
-/// arguments to represent this information instead of an enum. Eventually this
-/// should change over to use this _easier to read_ representation instead.
-///
-namespace MOTy {
- enum UseType {
- Use, /// This machine operand is only read by the instruction
- Def, /// This machine operand is only written by the instruction
- UseAndDef /// This machine operand is read AND written
- };
-}
+typedef short MachineOpCode;
//===----------------------------------------------------------------------===//
// class MachineOperand
//===----------------------------------------------------------------------===//
struct MachineOperand {
+private:
+ // Bit fields of the flags variable used for different operand properties
+ enum {
+ DEFFLAG = 0x01, // this is a def of the operand
+ USEFLAG = 0x02, // this is a use of the operand
+ HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
+ LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
+ HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
+ LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
+ PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
+ };
+
+public:
+ // UseType - This enum describes how the machine operand is used by
+ // the instruction. Note that the MachineInstr/Operator class
+ // currently uses bool arguments to represent this information
+ // instead of an enum. Eventually this should change over to use
+ // this _easier to read_ representation instead.
+ //
+ enum UseType {
+ Use = USEFLAG, /// only read
+ Def = DEFFLAG, /// only written
+ UseAndDef = Use | Def /// read AND written
+ };
+
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
MO_MachineRegister, // pre-assigned machine register `regNum'
MO_GlobalAddress, // Address of a global value
};
-private:
- // Bit fields of the flags variable used for different operand properties
- enum {
- DEFFLAG = 0x01, // this is a def of the operand
- USEFLAG = 0x02, // this is a use of the operand
- HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
- LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
- HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
- LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
- PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
- };
-
private:
union {
- Value* value; // BasicBlockVal for a label operand.
- // ConstantVal for a non-address immediate.
- // Virtual register for an SSA operand,
- // including hidden operands required for
- // the generated machine code.
- // LLVM global for MO_GlobalAddress.
+ Value* value; // BasicBlockVal for a label operand.
+ // ConstantVal for a non-address immediate.
+ // Virtual register for an SSA operand,
+ // including hidden operands required for
+ // the generated machine code.
+ // LLVM global for MO_GlobalAddress.
- int64_t immedVal; // Constant value for an explicit constant
+ int immedVal; // Constant value for an explicit constant
MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
- std::string *SymbolName; // For MO_ExternalSymbol type
- };
+ const char *SymbolName; // For MO_ExternalSymbol type
+ } contents;
char flags; // see bit field definitions above
MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
- int regNum; // register number for an explicit register
+ union {
+ int regNum; // register number for an explicit register
// will be set for a value after reg allocation
-private:
- MachineOperand()
- : immedVal(0),
- flags(0),
- opType(MO_VirtualRegister),
- regNum(-1) {}
-
- MachineOperand(int64_t ImmVal, MachineOperandType OpTy)
- : immedVal(ImmVal),
- flags(0),
- opType(OpTy),
- regNum(-1) {}
-
- MachineOperand(int Reg, MachineOperandType OpTy, MOTy::UseType UseTy)
- : immedVal(0),
- opType(OpTy),
- regNum(Reg) {
- switch (UseTy) {
- case MOTy::Use: flags = USEFLAG; break;
- case MOTy::Def: flags = DEFFLAG; break;
- case MOTy::UseAndDef: flags = DEFFLAG | USEFLAG; break;
- default: assert(0 && "Invalid value for UseTy!");
- }
+
+ int offset; // Offset to address of global or external, only
+ // valid for MO_GlobalAddress and MO_ExternalSym
+ } extra;
+
+ void zeroContents () {
+ memset (&contents, 0, sizeof (contents));
+ memset (&extra, 0, sizeof (extra));
+ }
+
+ MachineOperand(int ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
+ : flags(0), opType(OpTy) {
+ zeroContents ();
+ contents.immedVal = ImmVal;
+ extra.regNum = -1;
}
- MachineOperand(Value *V, MachineOperandType OpTy, MOTy::UseType UseTy,
+ MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
+ : flags(UseTy), opType(OpTy) {
+ zeroContents ();
+ extra.regNum = Reg;
+ }
+
+ MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
bool isPCRelative = false)
- : value(V), opType(OpTy), regNum(-1) {
- switch (UseTy) {
- case MOTy::Use: flags = USEFLAG; break;
- case MOTy::Def: flags = DEFFLAG; break;
- case MOTy::UseAndDef: flags = DEFFLAG | USEFLAG; break;
- default: assert(0 && "Invalid value for UseTy!");
- }
- if (isPCRelative) flags |= PCRELATIVE;
+ : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
+ assert(OpTy != MachineOperand::MO_GlobalAddress);
+ zeroContents();
+ contents.value = V;
+ extra.regNum = -1;
+ }
+
+ MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
+ bool isPCRelative = false, int Offset = 0)
+ : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
+ assert(OpTy == MachineOperand::MO_GlobalAddress);
+ zeroContents ();
+ contents.value = (Value*)V;
+ extra.offset = Offset;
}
MachineOperand(MachineBasicBlock *mbb)
- : MBB(mbb), flags(0), opType(MO_MachineBasicBlock), regNum(-1) {}
+ : flags(0), opType(MO_MachineBasicBlock) {
+ zeroContents ();
+ contents.MBB = mbb;
+ extra.regNum = -1;
+ }
- MachineOperand(const std::string &SymName, bool isPCRelative)
- : SymbolName(new std::string(SymName)), flags(isPCRelative ? PCRELATIVE :0),
- opType(MO_ExternalSymbol), regNum(-1) {}
+ MachineOperand(const char *SymName, bool isPCRelative, int Offset)
+ : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
+ zeroContents ();
+ contents.SymbolName = SymName;
+ extra.offset = Offset;
+ }
public:
- MachineOperand(const MachineOperand &M) : immedVal(M.immedVal),
- flags(M.flags),
- opType(M.opType),
- regNum(M.regNum) {
- if (isExternalSymbol())
- SymbolName = new std::string(M.getSymbolName());
+ MachineOperand(const MachineOperand &M)
+ : flags(M.flags), opType(M.opType) {
+ zeroContents ();
+ contents = M.contents;
+ extra = M.extra;
}
- ~MachineOperand() {
- if (isExternalSymbol())
- delete SymbolName;
- }
+
+ ~MachineOperand() {}
const MachineOperand &operator=(const MachineOperand &MO) {
- if (isExternalSymbol()) // if old operand had a symbol name,
- delete SymbolName; // release old memory
- immedVal = MO.immedVal;
+ contents = MO.contents;
flags = MO.flags;
opType = MO.opType;
- regNum = MO.regNum;
- if (isExternalSymbol())
- SymbolName = new std::string(MO.getSymbolName());
+ extra = MO.extra;
return *this;
}
- // Accessor methods. Caller is responsible for checking the
- // operand type before invoking the corresponding accessor.
- //
+ /// getType - Returns the MachineOperandType for this operand.
+ ///
MachineOperandType getType() const { return opType; }
+ /// getUseType - Returns the MachineOperandUseType of this operand.
+ ///
+ UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
+
/// isPCRelative - This returns the value of the PCRELATIVE flag, which
/// indicates whether this operand should be emitted as a PC relative value
/// instead of a global address. This is used for operands of the forms:
///
bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
-
/// isRegister - Return true if this operand is a register operand. The X86
/// backend currently can't decide whether to use MO_MR or MO_VR to represent
/// them, so we accept both.
return opType == MO_MachineRegister || opType == MO_VirtualRegister;
}
+ /// Accessors that tell you what kind of MachineOperand you're looking at.
+ ///
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
bool isImmediate() const {
bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
- Value* getVRegValue() const {
- assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
- isPCRelativeDisp());
- return value;
- }
+ /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
+ /// has one. This is deprecated and only used by the SPARC v9 backend.
+ ///
Value* getVRegValueOrNull() const {
return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
- isPCRelativeDisp()) ? value : NULL;
+ isPCRelativeDisp()) ? contents.value : NULL;
+ }
+
+ /// MachineOperand accessors that only work on certain types of
+ /// MachineOperand...
+ ///
+ Value* getVRegValue() const {
+ assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
+ || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
+ return contents.value;
}
int getMachineRegNum() const {
- assert(opType == MO_MachineRegister);
- return regNum;
+ assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
+ return extra.regNum;
+ }
+ int getImmedValue() const {
+ assert(isImmediate() && "Wrong MachineOperand accessor");
+ return contents.immedVal;
}
- int64_t getImmedValue() const { assert(isImmediate()); return immedVal; }
- void setImmedValue(int64_t ImmVal) { assert(isImmediate()); immedVal=ImmVal; }
-
MachineBasicBlock *getMachineBasicBlock() const {
- assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
- return MBB;
+ assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
+ return contents.MBB;
+ }
+ void setMachineBasicBlock(MachineBasicBlock *MBB) {
+ assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
+ contents.MBB = MBB;
+ }
+ int getFrameIndex() const {
+ assert(isFrameIndex() && "Wrong MachineOperand accessor");
+ return contents.immedVal;
}
- int getFrameIndex() const { assert(isFrameIndex()); return immedVal; }
unsigned getConstantPoolIndex() const {
- assert(isConstantPoolIndex());
- return immedVal;
+ assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
+ return contents.immedVal;
}
-
GlobalValue *getGlobal() const {
- assert(isGlobalAddress());
- return (GlobalValue*)value;
+ assert(isGlobalAddress() && "Wrong MachineOperand accessor");
+ return (GlobalValue*)contents.value;
}
-
- const std::string &getSymbolName() const {
- assert(isExternalSymbol());
- return *SymbolName;
+ int getOffset() const {
+ assert((isGlobalAddress() || isExternalSymbol()) &&
+ "Wrong MachineOperand accessor");
+ return extra.offset;
+ }
+ const char *getSymbolName() const {
+ assert(isExternalSymbol() && "Wrong MachineOperand accessor");
+ return contents.SymbolName;
}
+ /// MachineOperand methods for testing that work on any kind of
+ /// MachineOperand...
+ ///
bool isUse () const { return flags & USEFLAG; }
MachineOperand& setUse () { flags |= USEFLAG; return *this; }
- bool isDef () const { return flags & DEFFLAG; }
+ bool isDef () const { return flags & DEFFLAG; }
MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
bool isHiBits32 () const { return flags & HIFLAG32; }
bool isLoBits32 () const { return flags & LOFLAG32; }
bool isHiBits64 () const { return flags & HIFLAG64; }
bool isLoBits64 () const { return flags & LOFLAG64; }
- // used to check if a machine register has been allocated to this operand
+ /// hasAllocatedReg - Returns true iff a machine register has been
+ /// allocated to this operand.
+ ///
bool hasAllocatedReg() const {
- return (regNum >= 0 &&
+ return (extra.regNum >= 0 &&
(opType == MO_VirtualRegister || opType == MO_CCRegister ||
opType == MO_MachineRegister));
}
- // used to get the reg number if when one is allocated
- int getAllocatedRegNum() const {
+ /// getReg - Returns the register number. It is a runtime error to call this
+ /// if a register is not allocated.
+ ///
+ unsigned getReg() const {
assert(hasAllocatedReg());
- return regNum;
+ return extra.regNum;
}
- // ********** TODO: get rid of this duplicate code! ***********
- unsigned getReg() const {
- return getAllocatedRegNum();
- }
+ /// MachineOperand mutators...
+ ///
void setReg(unsigned Reg) {
+ // This method's comment used to say: 'TODO: get rid of this duplicate
+ // code.' It's not clear where the duplication is.
assert(hasAllocatedReg() && "This operand cannot have a register number!");
- regNum = Reg;
- }
+ extra.regNum = Reg;
+ }
- friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
+ void setValueReg(Value *val) {
+ assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
+ contents.value = val;
+ }
+
+ void setImmedValue(int immVal) {
+ assert(isImmediate() && "Wrong MachineOperand mutator");
+ contents.immedVal = immVal;
+ }
-private:
+ void setOffset(int Offset) {
+ assert((isGlobalAddress() || isExternalSymbol()) &&
+ "Wrong MachineOperand accessor");
+ extra.offset = Offset;
+ }
- // Construction methods needed for fine-grain control.
- // These must be accessed via coresponding methods in MachineInstr.
+ friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
+
+ /// markHi32, markLo32, etc. - These methods are deprecated and only used by
+ /// the SPARC v9 back-end.
+ ///
void markHi32() { flags |= HIFLAG32; }
void markLo32() { flags |= LOFLAG32; }
void markHi64() { flags |= HIFLAG64; }
void markLo64() { flags |= LOFLAG64; }
- // Replaces the Value with its corresponding physical register after
- // register allocation is complete
+private:
+ /// setRegForValue - Replaces the Value with its corresponding physical
+ /// register after register allocation is complete. This is deprecated
+ /// and only used by the SPARC v9 back-end.
+ ///
void setRegForValue(int reg) {
assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
opType == MO_MachineRegister);
- regNum = reg;
+ extra.regNum = reg;
}
friend class MachineInstr;
//===----------------------------------------------------------------------===//
class MachineInstr {
- int opCode; // the opcode
- unsigned opCodeFlags; // flags modifying instrn behavior
+ short Opcode; // the opcode
+ unsigned char numImplicitRefs; // number of implicit operands
std::vector<MachineOperand> operands; // the operands
- unsigned numImplicitRefs; // number of implicit operands
+ MachineInstr* prev, *next; // links for our intrusive list
+ MachineBasicBlock* parent; // pointer to the owning basic block
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
- MachineInstr(const MachineInstr &); // DO NOT IMPLEMENT
+ //Constructor used by clone() method
+ MachineInstr(const MachineInstr&);
+
void operator=(const MachineInstr&); // DO NOT IMPLEMENT
+
+ // Intrusive list support
+ //
+ friend struct ilist_traits<MachineInstr>;
+
public:
- MachineInstr(int Opcode, unsigned numOperands);
+ MachineInstr(short Opcode, unsigned numOperands);
/// MachineInstr ctor - This constructor only does a _reserve_ of the
/// operands, not a resize for them. It is expected that if you use this that
/// you call add* methods below to fill up the operands, instead of the Set
/// methods. Eventually, the "resizing" ctors will be phased out.
///
- MachineInstr(int Opcode, unsigned numOperands, bool XX, bool YY);
+ MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
/// block.
///
- MachineInstr(MachineBasicBlock *MBB, int Opcode, unsigned numOps);
+ MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
+ ~MachineInstr();
- // The opcode.
- //
- const int getOpcode() const { return opCode; }
- const int getOpCode() const { return opCode; }
+ const MachineBasicBlock* getParent() const { return parent; }
+ MachineBasicBlock* getParent() { return parent; }
- // Opcode flags.
- //
- unsigned getOpCodeFlags() const { return opCodeFlags; }
+ /// getOpcode - Returns the opcode of this MachineInstr.
+ ///
+ const int getOpcode() const { return Opcode; }
- //
- // Access to explicit operands of the instruction
- //
+ /// Access to explicit operands of the instruction.
+ ///
unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
const MachineOperand& getOperand(unsigned i) const {
MachineOperand::MO_VirtualRegister, V);
}
+ /// clone - Create a copy of 'this' instruction that is identical in
+ /// all ways except the the instruction has no parent, prev, or next.
+ MachineInstr* clone() const;
+
//
// Debugging support
//
- void print(std::ostream &OS, const TargetMachine &TM) const;
+ void print(std::ostream &OS, const TargetMachine *TM) const;
void dump() const;
friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
- !isDef ? MOTy::Use : (isDefAndUse ? MOTy::UseAndDef : MOTy::Def)));
+ operands.push_back(
+ MachineOperand(V, MachineOperand::MO_VirtualRegister,
+ !isDef ? MachineOperand::Use :
+ (isDefAndUse ? MachineOperand::UseAndDef :
+ MachineOperand::Def)));
}
- void addRegOperand(Value *V, MOTy::UseType UTy = MOTy::Use,
- bool isPCRelative = false) {
+ void addRegOperand(Value *V,
+ MachineOperand::UseType UTy = MachineOperand::Use,
+ bool isPCRelative = false) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
UTy, isPCRelative));
}
- void addCCRegOperand(Value *V, MOTy::UseType UTy = MOTy::Use) {
+ void addCCRegOperand(Value *V,
+ MachineOperand::UseType UTy = MachineOperand::Use) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
void addRegOperand(int reg, bool isDef) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister,
- isDef ? MOTy::Def : MOTy::Use));
+ operands.push_back(
+ MachineOperand(reg, MachineOperand::MO_VirtualRegister,
+ isDef ? MachineOperand::Def : MachineOperand::Use));
}
/// addRegOperand - Add a symbolic virtual register reference...
///
- void addRegOperand(int reg, MOTy::UseType UTy = MOTy::Use) {
+ void addRegOperand(int reg,
+ MachineOperand::UseType UTy = MachineOperand::Use) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(reg, MachineOperand::MO_VirtualRegister,
- UTy));
+ operands.push_back(
+ MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
}
/// addPCDispOperand - Add a PC relative displacement operand to the MI
void addPCDispOperand(Value *V) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(V, MachineOperand::MO_PCRelativeDisp,
- MOTy::Use));
+ operands.push_back(
+ MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
}
/// addMachineRegOperand - Add a virtual register operand to this MachineInstr
void addMachineRegOperand(int reg, bool isDef) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister,
- isDef ? MOTy::Def : MOTy::Use));
+ operands.push_back(
+ MachineOperand(reg, MachineOperand::MO_MachineRegister,
+ isDef ? MachineOperand::Def : MachineOperand::Use));
}
/// addMachineRegOperand - Add a virtual register operand to this MachineInstr
///
- void addMachineRegOperand(int reg, MOTy::UseType UTy = MOTy::Use) {
+ void addMachineRegOperand(int reg,
+ MachineOperand::UseType UTy = MachineOperand::Use) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(reg, MachineOperand::MO_MachineRegister,
- UTy));
+ operands.push_back(
+ MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
}
/// addZeroExtImmOperand - Add a zero extended constant argument to the
/// machine instruction.
///
- void addZeroExtImmOperand(int64_t intValue) {
+ void addZeroExtImmOperand(int intValue) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(intValue,
- MachineOperand::MO_UnextendedImmed));
+ operands.push_back(
+ MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
}
/// addSignExtImmOperand - Add a zero extended constant argument to the
/// machine instruction.
///
- void addSignExtImmOperand(int64_t intValue) {
+ void addSignExtImmOperand(int intValue) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand(intValue,
- MachineOperand::MO_SignExtendedImmed));
+ operands.push_back(
+ MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
}
- void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative) {
+ void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative, int Offset) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already done!");
- operands.push_back(MachineOperand((Value*)GV,
- MachineOperand::MO_GlobalAddress,
- MOTy::Use, isPCRelative));
+ operands.push_back(
+ MachineOperand(GV, MachineOperand::MO_GlobalAddress,
+ MachineOperand::Use, isPCRelative, Offset));
}
/// addExternalSymbolOperand - Add an external symbol operand to this instr
///
- void addExternalSymbolOperand(const std::string &SymName, bool isPCRelative) {
- operands.push_back(MachineOperand(SymName, isPCRelative));
+ void addExternalSymbolOperand(const char *SymName, bool isPCRelative) {
+ operands.push_back(MachineOperand(SymName, isPCRelative, 0));
}
//===--------------------------------------------------------------------===//
/// simply replace() and then set new operands with Set.*Operand methods
/// below.
///
- void replace(int Opcode, unsigned numOperands);
+ void replace(short Opcode, unsigned numOperands);
/// setOpcode - Replace the opcode of the current instruction with a new one.
///
- void setOpcode(unsigned Op) { opCode = Op; }
+ void setOpcode(unsigned Op) { Opcode = Op; }
/// RemoveOperand - Erase an operand from an instruction, leaving it with one
/// fewer operand than it started with.
// Access to set the operands when building the machine instruction
//
- void SetMachineOperandVal (unsigned i,
- MachineOperand::MachineOperandType operandType,
- Value* V);
+ void SetMachineOperandVal(unsigned i,
+ MachineOperand::MachineOperandType operandType,
+ Value* V);
- void SetMachineOperandConst (unsigned i,
- MachineOperand::MachineOperandType operandType,
- int64_t intValue);
+ void SetMachineOperandConst(unsigned i,
+ MachineOperand::MachineOperandType operandType,
+ int intValue);
void SetMachineOperandReg(unsigned i, int regNum);
unsigned substituteValue(const Value* oldVal, Value* newVal,
bool defsOnly, bool notDefsAndUses,
bool& someArgsWereIgnored);
-
- void setOperandHi32(unsigned i) { operands[i].markHi32(); }
- void setOperandLo32(unsigned i) { operands[i].markLo32(); }
- void setOperandHi64(unsigned i) { operands[i].markHi64(); }
- void setOperandLo64(unsigned i) { operands[i].markLo64(); }
-
// SetRegForOperand -
// SetRegForImplicitRef -
}
};
-
//===----------------------------------------------------------------------===//
// Debugging Support
projects / oota-llvm.git / blobdiff