Propagate debug info when building SelectionDAG.

[oota-llvm.git] / include / llvm / CodeGen / MachineInstr.h

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 0cdad848b9ac13a39511ae7934790d5d235c9436..2a3f98dbc5bd237e04355ed26c85e150d117654a 100644 (file)
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -22,6 +22,7 @@
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
 #include "llvm/Target/TargetInstrDesc.h"
+#include "llvm/CodeGen/DebugLoc.h"
 #include <list>
 #include <vector>
 
@@ -43,6 +44,7 @@ class MachineInstr : public ilist_node<MachineInstr> {
   std::vector<MachineOperand> Operands; // the operands
   std::list<MachineMemOperand> MemOperands; // information on memory references
   MachineBasicBlock *Parent;            // Pointer to the owning basic block.
+  DebugLoc debugLoc;                    // Source line information.
 
   // OperandComplete - Return true if it's illegal to add a new operand
   bool OperandsComplete() const;
@@ -64,17 +66,34 @@ class MachineInstr : public ilist_node<MachineInstr> {
   /// TID NULL and no operands.
   MachineInstr();
 
+  // The next two constructors have DebugLoc and non-DebugLoc versions;
+  // over time, the non-DebugLoc versions should be phased out and eventually
+  // removed.
+
   /// MachineInstr ctor - This constructor create a MachineInstr and add the
   /// implicit operands.  It reserves space for number of operands specified by
-  /// TargetInstrDesc.
+  /// TargetInstrDesc.  The version with a DebugLoc should be preferred.
   explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
 
   /// MachineInstr ctor - Work exactly the same as the ctor above, except that
   /// the MachineInstr is created and added to the end of the specified basic
-  /// block.
+  /// block.  The version with a DebugLoc should be preferred.
   ///
   MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
 
+  /// MachineInstr ctor - This constructor create a MachineInstr and add the
+  /// implicit operands.  It reserves space for number of operands specified by
+  /// TargetInstrDesc.  An explicit DebugLoc is supplied.
+  explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl, 
+                        bool NoImp = false);
+
+  /// MachineInstr ctor - Work exactly the same as the ctor above, except that
+  /// the MachineInstr is created and added to the end of the specified basic
+  /// block.
+  ///
+  MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl, 
+               const TargetInstrDesc &TID);
+
   ~MachineInstr();
 
   // MachineInstrs are pool-allocated and owned by MachineFunction.
@@ -83,6 +102,10 @@ class MachineInstr : public ilist_node<MachineInstr> {
 public:
   const MachineBasicBlock* getParent() const { return Parent; }
   MachineBasicBlock* getParent() { return Parent; }
+
+  /// getDebugLoc - Returns the debug location id of this MachineInstr.
+  ///
+  const DebugLoc getDebugLoc() const { return debugLoc; }
   
   /// getDesc - Returns the target instruction descriptor of this
   /// MachineInstr.
@@ -208,7 +231,7 @@ public:
 
   /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
   /// a pointer to the MachineOperand rather than an index.
-  MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false,
+  MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
                                          const TargetRegisterInfo *TRI = NULL) {
     int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
     return (Idx == -1) ? NULL : &getOperand(Idx);
@@ -219,9 +242,9 @@ public:
   /// none is found.
   int findFirstPredOperandIdx() const;
   
-  /// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+  /// isRegReDefinedByTwoAddr - Given the index of a register def operand,
   /// check if the register def is a re-definition due to two addr elimination.
-  bool isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const;
+  bool isRegReDefinedByTwoAddr(unsigned DefIdx) const;
 
   /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
   ///
@@ -289,6 +312,11 @@ public:
   ///
   void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
 
+  /// setDebugLoc - Replace current source information with new such.
+  /// Avoid using this, the constructor argument is preferable.
+  ///
+  void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
+
   /// RemoveOperand - Erase an operand  from an instruction, leaving it with one
   /// fewer operand than it started with.
   ///