class GlobalValue;
template <typename T> class ilist_traits;
+template <typename T> class ilist;
-typedef int MachineOpCode;
-
-//===----------------------------------------------------------------------===//
-/// Special flags on instructions that modify the opcode.
-/// These flags are unused for now, but having them enforces that some
-/// changes will be needed if they are used.
-///
-enum MachineOpCodeFlags {
- AnnulFlag, /// 1 if annul bit is set on a branch
- PredTakenFlag, /// 1 if branch should be predicted taken
- PredNotTakenFlag /// 1 if branch should be predicted not taken
-};
+typedef short MachineOpCode;
//===----------------------------------------------------------------------===//
/// MOTy - MachineOperandType - This namespace contains an enum that describes
int regNum; // register number for an explicit register
// will be set for a value after reg allocation
private:
- MachineOperand()
- : immedVal(0),
- flags(0),
- opType(MO_VirtualRegister),
- regNum(-1) {}
-
- MachineOperand(int64_t ImmVal, MachineOperandType OpTy)
+ MachineOperand(int64_t ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
: immedVal(ImmVal),
flags(0),
opType(OpTy),
return *this;
}
- // Accessor methods. Caller is responsible for checking the
- // operand type before invoking the corresponding accessor.
- //
+ /// getType - Returns the MachineOperandType for this operand.
+ ///
MachineOperandType getType() const { return opType; }
+ /// getUseType - Returns the MachineOperandUseType of this operand.
+ ///
+ MOTy::UseType getUseType() const {
+ return isUse() ^ isDef() ? MOTy::UseAndDef :
+ (isUse() ? MOTy::Use : MOTy::Def);
+ }
+
/// isPCRelative - This returns the value of the PCRELATIVE flag, which
/// indicates whether this operand should be emitted as a PC relative value
/// instead of a global address. This is used for operands of the forms:
///
bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
-
/// isRegister - Return true if this operand is a register operand. The X86
/// backend currently can't decide whether to use MO_MR or MO_VR to represent
/// them, so we accept both.
}
// used to get the reg number if when one is allocated
- int getAllocatedRegNum() const {
+ unsigned getReg() const {
assert(hasAllocatedReg());
return regNum;
}
// ********** TODO: get rid of this duplicate code! ***********
- unsigned getReg() const {
- return getAllocatedRegNum();
- }
void setReg(unsigned Reg) {
assert(hasAllocatedReg() && "This operand cannot have a register number!");
regNum = Reg;
//===----------------------------------------------------------------------===//
class MachineInstr {
- int opCode; // the opcode
- unsigned opCodeFlags; // flags modifying instrn behavior
+ short Opcode; // the opcode
+ unsigned char numImplicitRefs; // number of implicit operands
std::vector<MachineOperand> operands; // the operands
- unsigned numImplicitRefs; // number of implicit operands
MachineInstr* prev, *next; // links for our intrusive list
+ MachineBasicBlock* parent; // pointer to the owning basic block
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
// Intrusive list support
//
friend class ilist_traits<MachineInstr>;
- MachineInstr() { /* this is for ilist use only to create the sentinel */ }
- MachineInstr* getPrev() const { return prev; }
- MachineInstr* getNext() const { return next; }
-
- void setPrev(MachineInstr* mi) { prev = mi; }
- void setNext(MachineInstr* mi) { next = mi; }
public:
- MachineInstr(int Opcode, unsigned numOperands);
+ MachineInstr(short Opcode, unsigned numOperands);
/// MachineInstr ctor - This constructor only does a _reserve_ of the
/// operands, not a resize for them. It is expected that if you use this that
/// you call add* methods below to fill up the operands, instead of the Set
/// methods. Eventually, the "resizing" ctors will be phased out.
///
- MachineInstr(int Opcode, unsigned numOperands, bool XX, bool YY);
+ MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
/// block.
///
- MachineInstr(MachineBasicBlock *MBB, int Opcode, unsigned numOps);
+ MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
- /// Accessors for opcode and associated flags.
+ ~MachineInstr();
+
+ const MachineBasicBlock* getParent() const { return parent; }
+ MachineBasicBlock* getParent() { return parent; }
+
+ /// Accessors for opcode.
///
- const int getOpcode() const { return opCode; }
- unsigned getOpCodeFlags() const { return opCodeFlags; }
+ const int getOpcode() const { return Opcode; }
/// Access to explicit operands of the instruction.
///
/// simply replace() and then set new operands with Set.*Operand methods
/// below.
///
- void replace(int Opcode, unsigned numOperands);
+ void replace(short Opcode, unsigned numOperands);
/// setOpcode - Replace the opcode of the current instruction with a new one.
///
- void setOpcode(unsigned Op) { opCode = Op; }
+ void setOpcode(unsigned Op) { Opcode = Op; }
/// RemoveOperand - Erase an operand from an instruction, leaving it with one
/// fewer operand than it started with.
}
};
-
//===----------------------------------------------------------------------===//
// Debugging Support
projects / oota-llvm.git / blobdiff