#include "llvm/ADT/iterator"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/Streams.h"
#include <vector>
#include <cassert>
+#include <iosfwd>
namespace llvm {
class Value;
class Function;
class MachineBasicBlock;
-class TargetInstrInfo;
class TargetInstrDescriptor;
class TargetMachine;
class GlobalValue;
int offset;
MachineOperand() {}
+
+ void print(std::ostream &os) const;
+ void print(std::ostream *os) const { if (os) print(*os); }
+
public:
MachineOperand(const MachineOperand &M) {
*this = M;
return IsDead;
}
void setIsKill() {
- assert(isRegister() && "Wrong MachineOperand accessor");
+ assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
IsKill = true;
}
void setIsDead() {
- assert(isRegister() && "Wrong MachineOperand accessor");
+ assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
IsDead = true;
}
void unsetIsKill() {
- assert(isRegister() && "Wrong MachineOperand accessor");
+ assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
IsKill = false;
}
void unsetIsDead() {
- assert(isRegister() && "Wrong MachineOperand accessor");
+ assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
IsDead = false;
}
}
/// isIdenticalTo - Return true if this operand is identical to the specified
- /// operand.
+ /// operand. Note: This method ignores isKill and isDead properties.
bool isIdenticalTo(const MachineOperand &Other) const;
/// ChangeToImmediate - Replace this operand with a new immediate operand of
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
- void ChangeToRegister(unsigned Reg, bool isDef,
- bool isKill = false, bool isDead = false) {
+ void ChangeToRegister(unsigned Reg, bool isDef) {
opType = MO_Register;
contents.RegNo = Reg;
IsDef = isDef;
- IsKill = isKill;
- IsDead = isDead;
+ IsImp = false;
+ IsKill = false;
+ IsDead = false;
}
- friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
+ friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {
+ mop.print(os);
+ return os;
+ }
friend class MachineInstr;
};
/// MachineInstr - Representation of each machine instruction.
///
class MachineInstr {
- short Opcode; // the opcode
+ const TargetInstrDescriptor *TID; // Instruction descriptor.
+ unsigned short NumImplicitOps; // Number of implicit operands (which
+ // are determined at construction time).
+
std::vector<MachineOperand> Operands; // the operands
MachineInstr* prev, *next; // links for our intrusive list
MachineBasicBlock* parent; // pointer to the owning basic block
- unsigned NumImplicitOps; // Number of implicit operands (which
- // are determined at construction time).
-
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
friend struct ilist_traits<MachineInstr>;
public:
- /// MachineInstr ctor - This constructor reserves space for numOperand
- /// operands.
- MachineInstr(short Opcode, unsigned numOperands);
+ /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
+ /// TID NULL and no operands.
+ MachineInstr();
/// MachineInstr ctor - This constructor create a MachineInstr and add the
- /// implicit operands. It reserves space for numOperand operands.
- MachineInstr(const TargetInstrInfo &TII, short Opcode, unsigned numOperands);
+ /// implicit operands. It reserves space for number of operands specified by
+ /// TargetInstrDescriptor.
+ MachineInstr(const TargetInstrDescriptor &TID);
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
/// block.
///
- MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
+ MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
~MachineInstr();
const MachineBasicBlock* getParent() const { return parent; }
MachineBasicBlock* getParent() { return parent; }
+
+ /// getInstrDescriptor - Returns the target instruction descriptor of this
+ /// MachineInstr.
+ const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
/// getOpcode - Returns the opcode of this MachineInstr.
///
- const int getOpcode() const { return Opcode; }
+ const int getOpcode() const;
/// Access to explicit operands of the instruction.
///
delete removeFromParent();
}
+ /// findRegisterUseOperand() - Returns the MachineOperand that is a use of
+ /// the specific register or NULL if it is not found.
+ MachineOperand *findRegisterUseOperand(unsigned Reg);
+
+ /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
+ ///
+ void copyKillDeadInfo(const MachineInstr *MI);
+
//
// Debugging support
//
+ void print(std::ostream *OS, const TargetMachine *TM) const {
+ if (OS) print(*OS, TM);
+ }
void print(std::ostream &OS, const TargetMachine *TM) const;
+ void print(std::ostream &OS) const;
+ void print(std::ostream *OS) const { if (OS) print(*OS); }
void dump() const;
- friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
+ friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){
+ minstr.print(os);
+ return os;
+ }
//===--------------------------------------------------------------------===//
// Accessors to add operands when building up machine instructions.
// Accessors used to modify instructions in place.
//
- /// setOpcode - Replace the opcode of the current instruction with a new one.
+ /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
+ /// the current instruction with a new one.
///
- void setOpcode(unsigned Op);
+ void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
/// RemoveOperand - Erase an operand from an instruction, leaving it with one
/// fewer operand than it started with.
/// addImplicitDefUseOperands - Add all implicit def and use operands to
/// this instruction.
- void addImplicitDefUseOperands(const TargetInstrDescriptor &TID);
+ void addImplicitDefUseOperands();
};
//===----------------------------------------------------------------------===//
projects / oota-llvm.git / blobdiff