//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
-//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
// This file exposes a function named BuildMI, which is useful for dramatically
// simplifying how MachineInstr's are created. Instead of using code like this:
//
-// M = new MachineInstr(X86::ADDrr32);
+// M = new MachineInstr(X86::ADDrr8);
// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
//
#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
-#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
namespace llvm {
/// Allow automatic conversion to the machine instruction we are working on.
///
operator MachineInstr*() const { return MI; }
+ operator MachineBasicBlock::iterator() const { return MI; }
/// addReg - Add a new virtual register operand...
///
- const MachineInstrBuilder &addReg(int RegNo,
- MOTy::UseType Ty = MOTy::Use) const {
+ const MachineInstrBuilder &addReg(
+ int RegNo,
+ MachineOperand::UseType Ty = MachineOperand::Use) const {
MI->addRegOperand(RegNo, Ty);
return *this;
}
/// addReg - Add an LLVM value that is to be used as a register...
///
- const MachineInstrBuilder &addReg(Value *V,
- MOTy::UseType Ty = MOTy::Use) const {
+ const MachineInstrBuilder &addReg(
+ Value *V,
+ MachineOperand::UseType Ty = MachineOperand::Use) const {
MI->addRegOperand(V, Ty);
return *this;
}
/// addReg - Add an LLVM value that is to be used as a register...
///
- const MachineInstrBuilder &addCCReg(Value *V,
- MOTy::UseType Ty = MOTy::Use) const {
+ const MachineInstrBuilder &addCCReg(
+ Value *V,
+ MachineOperand::UseType Ty = MachineOperand::Use) const {
MI->addCCRegOperand(V, Ty);
return *this;
}
/// addRegDef - Add an LLVM value that is to be defined as a register... this
- /// is the same as addReg(V, MOTy::Def).
+ /// is the same as addReg(V, MachineOperand::Def).
///
const MachineInstrBuilder &addRegDef(Value *V) const {
- return addReg(V, MOTy::Def);
+ return addReg(V, MachineOperand::Def);
}
/// addPCDisp - Add an LLVM value to be treated as a PC relative
/// addMReg - Add a machine register operand...
///
- const MachineInstrBuilder &addMReg(int Reg,
- MOTy::UseType Ty = MOTy::Use) const {
+ const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
+ = MachineOperand::Use) const {
MI->addMachineRegOperand(Reg, Ty);
return *this;
}
+ /// addImm - Add a new immediate operand.
+ ///
+ const MachineInstrBuilder &addImm(int Val) const {
+ MI->addZeroExtImmOperand(Val);
+ return *this;
+ }
+
/// addSImm - Add a new sign extended immediate operand...
///
- const MachineInstrBuilder &addSImm(int64_t val) const {
+ const MachineInstrBuilder &addSImm(int val) const {
MI->addSignExtImmOperand(val);
return *this;
}
/// addZImm - Add a new zero extended immediate operand...
///
- const MachineInstrBuilder &addZImm(int64_t Val) const {
+ const MachineInstrBuilder &addZImm(unsigned Val) const {
MI->addZeroExtImmOperand(Val);
return *this;
}
+ /// addImm64 - Add a new 64-bit immediate operand...
+ ///
+ const MachineInstrBuilder &addImm64(uint64_t Val) const {
+ MI->addZeroExtImm64Operand(Val);
+ return *this;
+ }
+
const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
MI->addMachineBasicBlockOperand(MBB);
return *this;
return *this;
}
- const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
- MI->addConstantPoolIndexOperand(Idx);
+ const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
+ int Offset = 0) const {
+ MI->addConstantPoolIndexOperand(Idx, Offset);
return *this;
}
const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
- bool isPCRelative = false) const {
- MI->addGlobalAddressOperand(GV, isPCRelative);
+ bool isPCRelative = false,
+ int Offset = 0) const {
+ MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
return *this;
}
- const MachineInstrBuilder &addExternalSymbol(const std::string &Name,
- bool isPCRelative = false) const{
- MI->addExternalSymbolOperand(Name, isPCRelative);
+ const MachineInstrBuilder &addExternalSymbol(const char *FnName,
+ bool isPCRelative = false) const{
+ MI->addExternalSymbolOperand(FnName, isPCRelative);
return *this;
}
};
return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
}
-/// BuildMI - This version of the builder also sets up the first "operand" as a
+/// BuildMI - This version of the builder sets up the first operand as a
/// destination virtual register. NumOperands is the number of additional add*
-/// calls that are expected, it does not include the destination register.
+/// calls that are expected, not including the destination register.
///
-inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands,
- unsigned DestReg) {
+inline MachineInstrBuilder BuildMI(
+ int Opcode, unsigned NumOperands,
+ unsigned DestReg,
+ MachineOperand::UseType useType = MachineOperand::Def) {
return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
- true, true)).addReg(DestReg, MOTy::Def);
+ true, true)).addReg(DestReg, useType);
}
+/// BuildMI - This version of the builder inserts the newly-built
+/// instruction before the given position in the given MachineBasicBlock, and
+/// sets up the first operand as a destination virtual register.
+/// NumOperands is the number of additional add* calls that are expected,
+/// not including the destination register.
+///
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::iterator I,
+ int Opcode, unsigned NumOperands,
+ unsigned DestReg) {
+ MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
+}
-/// BuildMI - This version of the builder inserts the built MachineInstr into
-/// the specified MachineBasicBlock.
+/// BuildMI - This version of the builder inserts the newly-built
+/// instruction before the given position in the given MachineBasicBlock, and
+/// does NOT take a destination register.
+///
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::iterator I,
+ int Opcode, unsigned NumOperands) {
+ MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MI);
+}
+
+/// BuildMI - This version of the builder inserts the newly-built
+/// instruction at the end of the given MachineBasicBlock, and does NOT take a
+/// destination register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
unsigned NumOperands) {
- return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands));
+ return BuildMI(*BB, BB->end(), Opcode, NumOperands);
}
-/// BuildMI - This version of the builder inserts the built MachineInstr into
-/// the specified MachineBasicBlock, and also sets up the first "operand" as a
-/// destination virtual register. NumOperands is the number of additional add*
-/// calls that are expected, it does not include the destination register.
+/// BuildMI - This version of the builder inserts the newly-built
+/// instruction at the end of the given MachineBasicBlock, and sets up the first
+/// operand as a destination virtual register. NumOperands is the number of
+/// additional add* calls that are expected, not including the destination
+/// register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
unsigned NumOperands, unsigned DestReg) {
- return MachineInstrBuilder(new MachineInstr(BB, Opcode,
- NumOperands+1)).addReg(DestReg,
- MOTy::Def);
+ return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
}
} // End llvm namespace
projects / oota-llvm.git / blobdiff