Propagate debug info when building SelectionDAG.

[oota-llvm.git] / include / llvm / CodeGen / MachineRegisterInfo.h

diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h
index 2f25a5e140bf40bc1e16efc6d01fc92b21ba1635..b313fce182f802ae21c8bdd9ebbeec20b9dde058 100644 (file)
--- a/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -81,6 +81,10 @@ public:
   }
   static reg_iterator reg_end() { return reg_iterator(0); }
 
+  /// reg_empty - Return true if there are no instructions using or defining the
+  /// specified register (it may be live-in).
+  bool reg_empty(unsigned RegNo) const { return reg_begin(RegNo) == reg_end(); }
+
   /// def_iterator/def_begin/def_end - Walk all defs of the specified register.
   typedef defusechain_iterator<false,true> def_iterator;
   def_iterator def_begin(unsigned RegNo) const {
@@ -88,6 +92,10 @@ public:
   }
   static def_iterator def_end() { return def_iterator(0); }
 
+  /// def_empty - Return true if there are no instructions defining the
+  /// specified register (it may be live-in).
+  bool def_empty(unsigned RegNo) const { return def_begin(RegNo) == def_end(); }
+
   /// use_iterator/use_begin/use_end - Walk all uses of the specified register.
   typedef defusechain_iterator<true,false> use_iterator;
   use_iterator use_begin(unsigned RegNo) const {
@@ -164,19 +172,7 @@ public:
   /// createVirtualRegister - Create and return a new virtual register in the
   /// function with the specified register class.
   ///
-  unsigned createVirtualRegister(const TargetRegisterClass *RegClass) {
-    assert(RegClass && "Cannot create register without RegClass!");
-    // Add a reg, but keep track of whether the vector reallocated or not.
-    void *ArrayBase = VRegInfo.empty() ? 0 : &VRegInfo[0];
-    VRegInfo.push_back(std::make_pair(RegClass, (MachineOperand*)0));
-
-    if (!((&VRegInfo[0] == ArrayBase || VRegInfo.size() == 1)))
-      // The vector reallocated, handle this now.
-      HandleVRegListReallocation();
-    unsigned VR = getLastVirtReg();
-    RegClass2VRegMap[RegClass->getID()].push_back(VR);
-    return VR;
-  }
+  unsigned createVirtualRegister(const TargetRegisterClass *RegClass);
 
   /// getLastVirtReg - Return the highest currently assigned virtual register.
   ///