#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
-#include "llvm/ADT/OwningPtr.h"
#include "llvm/Target/TargetRegisterInfo.h"
namespace llvm {
bool ProperSubClass;
uint8_t MinCost;
uint16_t LastCostChange;
- OwningArrayPtr<MCPhysReg> Order;
+ std::unique_ptr<MCPhysReg[]> Order;
RCInfo()
: Tag(0), NumRegs(0), ProperSubClass(false), MinCost(0),
};
// Brief cached information for each register class.
- OwningArrayPtr<RCInfo> RegClass;
+ std::unique_ptr<RCInfo[]> RegClass;
// Tag changes whenever cached information needs to be recomputed. An RCInfo
// entry is valid when its tag matches.
// Callee saved registers of last MF. Assumed to be valid until the next
// runOnFunction() call.
- const uint16_t *CalleeSaved;
+ const MCPhysReg *CalleeSaved;
// Map register number to CalleeSaved index + 1;
SmallVector<uint8_t, 4> CSRNum;
// Reserved registers in the current MF.
BitVector Reserved;
- OwningArrayPtr<unsigned> PSetLimits;
+ std::unique_ptr<unsigned[]> PSetLimits;
// Compute all information about RC.
void compute(const TargetRegisterClass *RC) const;