Reference RegionPass to stop it being eliminated.

[oota-llvm.git] / include / llvm / CodeGen / RegisterCoalescer.h

diff --git a/include/llvm/CodeGen/RegisterCoalescer.h b/include/llvm/CodeGen/RegisterCoalescer.h
index e3d3e796336cbbf5dff6f6af9b07f8f7118170d6..7644433a33a15d2b13404027517ca4749573f3da 100644 (file)
--- a/include/llvm/CodeGen/RegisterCoalescer.h
+++ b/include/llvm/CodeGen/RegisterCoalescer.h
@@ -168,6 +168,9 @@ namespace llvm {
     /// partial_ - True when the original copy was a partial subregister copy.
     bool partial_;
 
+    /// crossClass_ - True when both regs are virtual, and newRC is constrained.
+    bool crossClass_;
+
     /// flipped_ - True when DstReg and SrcReg are reversed from the oriignal copy
     /// instruction.
     bool flipped_;
@@ -186,7 +189,7 @@ namespace llvm {
   public:
     CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
       : tii_(tii), tri_(tri), dstReg_(0), srcReg_(0), subIdx_(0),
-        partial_(false), flipped_(false), newRC_(0) {}
+        partial_(false), crossClass_(false), flipped_(false), newRC_(0) {}
 
     /// setRegisters - set registers to match the copy instruction MI. Return
     /// false if MI is not a coalescable copy instruction.
@@ -207,6 +210,9 @@ namespace llvm {
     /// full register, but was a subreg operation.
     bool isPartial() const { return partial_; }
 
+    /// isCrossClass - Return true if DstReg is virtual and NewRC is a smaller register class than DstReg's.
+    bool isCrossClass() const { return crossClass_; }
+
     /// isFlipped - Return true when getSrcReg is the register being defined by
     /// the original copy instruction.
     bool isFlipped() const { return flipped_; }