no really, I can spell!

[oota-llvm.git] / include / llvm / CodeGen / RegisterScavenging.h

diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index f66cf156e6cc88bda495567a691952bd212f0c8e..458c2e4487f9ce31b6f4769838e970f2daad392f 100644 (file)
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the Evan Cheng and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -19,14 +19,19 @@
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
 
 namespace llvm {
 
-class MRegisterInfo;
+class MachineRegisterInfo;
+class TargetRegisterInfo;
 class TargetInstrInfo;
 class TargetRegisterClass;
 
 class RegScavenger {
+  const TargetRegisterInfo *TRI;
+  const TargetInstrInfo *TII;
+  MachineRegisterInfo* MRI;
   MachineBasicBlock *MBB;
   MachineBasicBlock::iterator MBBI;
   unsigned NumPhysRegs;
@@ -47,19 +52,35 @@ class RegScavenger {
   ///
   const TargetRegisterClass *ScavengedRC;
 
-  /// RegStates - The current state of all the physical registers immediately
+  /// ScavengeRestore - Instruction that restores the scavenged register from
+  /// stack.
+  const MachineInstr *ScavengeRestore;
+
+  /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
+  ///
+  BitVector CalleeSavedRegs;
+
+  /// ReservedRegs - A bitvector of reserved registers.
+  ///
+  BitVector ReservedRegs;
+
+  /// RegsAvailable - The current state of all the physical registers immediately
   /// before MBBI. One bit per physical register. If bit is set that means it's
   /// available, unset means the register is currently being used.
-  BitVector RegStates;
+  BitVector RegsAvailable;
+
+  /// CurrDist - Distance from MBB entry to the current instruction MBBI.
+  ///
+  unsigned CurrDist;
+
+  /// DistanceMap - Keep track the distance of a MI from the start of the
+  /// current basic block.
+  DenseMap<MachineInstr*, unsigned> DistanceMap;
 
 public:
   RegScavenger()
     : MBB(NULL), NumPhysRegs(0), Tracking(false),
-      ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
-
-  RegScavenger(MachineBasicBlock *mbb)
-    : MBB(mbb), NumPhysRegs(0), Tracking(false),
-      ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {};
+      ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
 
   /// enterBasicBlock - Start tracking liveness from the begin of the specific
   /// basic block.
@@ -73,6 +94,7 @@ public:
   /// forward / backward - Move the internal MBB iterator and update register
   /// states until it has processed the specific iterator.
   void forward(MachineBasicBlock::iterator I) {
+    if (!Tracking && MBB->begin() != I) forward();
     while (MBBI != I) forward();
   }
   void backward(MachineBasicBlock::iterator I) {
@@ -88,18 +110,22 @@ public:
 
   /// isUsed / isUsed - Test if a register is currently being used.
   ///
-  bool isUsed(unsigned Reg) const   { return !RegStates[Reg]; }
-  bool isUnused(unsigned Reg) const { return RegStates[Reg]; }
+  bool isUsed(unsigned Reg) const   { return !RegsAvailable[Reg]; }
+  bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
 
   /// getRegsUsed - return all registers currently in use in used.
   void getRegsUsed(BitVector &used, bool includeReserved);
 
   /// setUsed / setUnused - Mark the state of one or a number of registers.
   ///
-  void setUsed(unsigned Reg)     { RegStates.reset(Reg); }
-  void setUsed(BitVector Regs)   { RegStates &= ~Regs; }
-  void setUnused(unsigned Reg)   { RegStates.set(Reg); }
-  void setUnused(BitVector Regs) { RegStates |= Regs; }
+  void setUsed(unsigned Reg);
+  void setUsed(BitVector &Regs) {
+    RegsAvailable &= ~Regs;
+  }
+  void setUnused(unsigned Reg, const MachineInstr *MI);
+  void setUnused(BitVector &Regs) {
+    RegsAvailable |= Regs;
+  }
 
   /// FindUnusedReg - Find a unused register of the specified register class
   /// from the specified set of registers. It return 0 is none is found.
@@ -117,29 +143,23 @@ public:
   int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
 
   /// scavengeRegister - Make a register of the specific register class
-  /// available and do the appropriate bookkeeping. Returns the scavenged
-  /// register.
+  /// available and do the appropriate bookkeeping. SPAdj is the stack
+  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
+  /// Returns the scavenged register.
   unsigned scavengeRegister(const TargetRegisterClass *RegClass,
-                            MachineBasicBlock::iterator I);
-  unsigned scavengeRegister(const TargetRegisterClass *RegClass) {
-    return scavengeRegister(RegClass, MBBI);
+                            MachineBasicBlock::iterator I, int SPAdj);
+  unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
+    return scavengeRegister(RegClass, MBBI, SPAdj);
   }
 
 private:
-  const MRegisterInfo *RegInfo;
-  const TargetInstrInfo *TII;
-
-  /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
-  ///
-  BitVector CalleeSavedRegs;
-
-  /// ReservedRegs - A bitvector of reserved registers.
-  ///
-  BitVector ReservedRegs;
-
   /// restoreScavengedReg - Restore scavenged by loading it back from the
   /// emergency spill slot. Mark it used.
   void restoreScavengedReg();
+
+  MachineInstr *findFirstUse(MachineBasicBlock *MBB,
+                             MachineBasicBlock::iterator I, unsigned Reg,
+                             unsigned &Dist);
 };
  
 } // End llvm namespace