//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the Evan Cheng and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
namespace llvm {
+class MachineRegisterInfo;
+class TargetRegisterInfo;
+class TargetInstrInfo;
class TargetRegisterClass;
class RegScavenger {
+ const TargetRegisterInfo *TRI;
+ const TargetInstrInfo *TII;
+ MachineRegisterInfo* MRI;
MachineBasicBlock *MBB;
MachineBasicBlock::iterator MBBI;
unsigned NumPhysRegs;
/// registers.
bool Tracking;
- /// RegStates - The current state of all the physical registers immediately
+ /// ScavengingFrameIndex - Special spill slot used for scavenging a register
+ /// post register allocation.
+ int ScavengingFrameIndex;
+
+ /// ScavengedReg - If none zero, the specific register is currently being
+ /// scavenged. That is, it is spilled to the special scavenging stack slot.
+ unsigned ScavengedReg;
+
+ /// ScavengedRC - Register class of the scavenged register.
+ ///
+ const TargetRegisterClass *ScavengedRC;
+
+ /// ScavengeRestore - Instruction that restores the scavenged register from
+ /// stack.
+ const MachineInstr *ScavengeRestore;
+
+ /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
+ ///
+ BitVector CalleeSavedRegs;
+
+ /// ReservedRegs - A bitvector of reserved registers.
+ ///
+ BitVector ReservedRegs;
+
+ /// RegsAvailable - The current state of all the physical registers immediately
/// before MBBI. One bit per physical register. If bit is set that means it's
/// available, unset means the register is currently being used.
- BitVector RegStates;
+ BitVector RegsAvailable;
public:
RegScavenger()
- : MBB(NULL), NumPhysRegs(0), Tracking(false) {};
+ : MBB(NULL), NumPhysRegs(0), Tracking(false),
+ ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
- RegScavenger(MachineBasicBlock *mbb)
- : MBB(mbb), NumPhysRegs(0), Tracking(false) {};
+ /// enterBasicBlock - Start tracking liveness from the begin of the specific
+ /// basic block.
+ void enterBasicBlock(MachineBasicBlock *mbb);
- /// Init - Initialize the states.
- ///
- void init(MachineBasicBlock *mbb);
+ /// initRegState - allow resetting register state info for multiple
+ /// passes over/within the same function.
+ void initRegState();
- /// Reset - Discard previous states and re-initialize the states given for
- /// the specific basic block.
- void reset(MachineBasicBlock *mbb) {
- clear();
- init(mbb);
- }
-
- /// forward / backward - Move the internal MBB iterator and update register
- /// states.
+ /// forward - Move the internal MBB iterator and update register states.
void forward();
- void backward();
- /// forward / backward - Move the internal MBB iterator and update register
- /// states until it has reached but not processed the specific iterator.
+ /// forward - Move the internal MBB iterator and update register states until
+ /// it has processed the specific iterator.
void forward(MachineBasicBlock::iterator I) {
+ if (!Tracking && MBB->begin() != I) forward();
while (MBBI != I) forward();
}
- void backward(MachineBasicBlock::iterator I) {
- while (MBBI != I) backward();
+
+ /// skipTo - Move the internal MBB iterator but do not update register states.
+ ///
+ void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
+
+ /// getRegsUsed - return all registers currently in use in used.
+ void getRegsUsed(BitVector &used, bool includeReserved);
+
+ /// FindUnusedReg - Find a unused register of the specified register class.
+ /// Return 0 if none is found.
+ unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
+
+ /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
+ /// ScavengingFrameIndex.
+ void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
+ int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
+
+ /// scavengeRegister - Make a register of the specific register class
+ /// available and do the appropriate bookkeeping. SPAdj is the stack
+ /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
+ /// Returns the scavenged register.
+ unsigned scavengeRegister(const TargetRegisterClass *RegClass,
+ MachineBasicBlock::iterator I, int SPAdj);
+ unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
+ return scavengeRegister(RegClass, MBBI, SPAdj);
}
+private:
/// isReserved - Returns true if a register is reserved. It is never "unused".
- bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
+ bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); }
- /// isUsed / isUsed - Test if a register is currently being used.
+ /// isUsed / isUnused - Test if a register is currently being used.
///
- bool isUsed(unsigned Reg) const { return !RegStates[Reg]; }
- bool isUnused(unsigned Reg) const { return RegStates[Reg]; }
+ bool isUsed(unsigned Reg) const { return !RegsAvailable.test(Reg); }
+ bool isUnused(unsigned Reg) const { return RegsAvailable.test(Reg); }
+
+ /// isAliasUsed - Is Reg or an alias currently in use?
+ bool isAliasUsed(unsigned Reg) const;
/// setUsed / setUnused - Mark the state of one or a number of registers.
///
- void setUsed(unsigned Reg) { RegStates.reset(Reg); }
- void setUsed(BitVector Regs) { RegStates &= ~Regs; }
- void setUnused(unsigned Reg) { RegStates.set(Reg); }
- void setUnused(BitVector Regs) { RegStates |= Regs; }
+ void setUsed(unsigned Reg);
+ void setUsed(BitVector &Regs) {
+ RegsAvailable &= ~Regs;
+ }
+ void setUnused(BitVector &Regs) {
+ RegsAvailable |= Regs;
+ }
- /// FindUnusedReg - Find a unused register of the specified register class.
- /// Exclude callee saved registers if directed. It return 0 is none is found.
- unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
- bool ExCalleeSaved = false) const;
+ /// Add Reg and all its sub-registers to BV.
+ void addRegWithSubRegs(BitVector &BV, unsigned Reg);
-private:
- /// clear - Clear states.
- ///
- void clear();
+ /// Add Reg and its aliases to BV.
+ void addRegWithAliases(BitVector &BV, unsigned Reg);
- /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
- ///
- BitVector CalleeSavedRegs;
+ unsigned findSurvivorReg(MachineBasicBlock::iterator MI,
+ BitVector &Candidates,
+ unsigned InstrLimit,
+ MachineBasicBlock::iterator &UseMI);
- /// ReservedRegs - A bitvector of reserved registers.
- ///
- BitVector ReservedRegs;
};
-
+
} // End llvm namespace
#endif